Enable SMP on Ingenic JZ4780.
It is required to proceed full cache flush before we can use wait instruction on multicore, so use nop instead for now. Submitted by: kan Sponsored by: DARPA, AFRL
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=308859
@ -53,7 +53,7 @@ options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required
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#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
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#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
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# Make an SMP-capable kernel by default
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# Make an SMP-capable kernel by default
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# options SMP # Symmetric MultiProcessor Kernel
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options SMP # Symmetric MultiProcessor Kernel
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device loop
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device loop
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device ether
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device ether
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@ -590,7 +590,11 @@ GLOBAL(MipsWaitStart) # this is 16 byte aligned
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mtc0 t1, MIPS_COP_0_STATUS
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mtc0 t1, MIPS_COP_0_STATUS
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bnez v0, MipsWaitEnd
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bnez v0, MipsWaitEnd
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nop
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nop
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#if defined(CPU_XBURST) && defined(SMP)
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nop
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#else
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wait
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wait
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#endif
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GLOBAL(MipsWaitEnd) # MipsWaitStart + 16
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GLOBAL(MipsWaitEnd) # MipsWaitStart + 16
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jr ra
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jr ra
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PTR_ADDU sp, sp, CALLFRAME_SIZ
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PTR_ADDU sp, sp, CALLFRAME_SIZ
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