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Use the pci_enable_* functions instead of manually fiddling with the

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command register.

Pointed out by:	msmith
This commit is contained in:
Thomas Moestl 2002-03-11 02:37:19 +00:00
parent e26ddc9f60
commit 49921f1e25
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=92046
2 changed files with 8 additions and 12 deletions
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10
sys/dev/gem/if_gem_pci.c
View File

@ -143,15 +143,13 @@ gem_pci_attach(dev)
{
struct gem_pci_softc *gsc = device_get_softc(dev);
struct gem_softc *sc = &gsc->gsc_gem;
u_int16_t csr;
/*
* Enable bus master access. The firmware does in some cases not do
* this for us on sparc64 machines.
* Enable bus master and memory access. The firmware does in some
* cases not do this for us on sparc64 machines.
*/
csr = pci_read_config(dev, PCIR_COMMAND, 2);
csr |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, csr, 2);
pci_enable_busmaster(dev);
pci_enable_io(dev, SYS_RES_MEMORY);
sc->sc_dev = dev;
sc->sc_pci = 1; /* XXX */

10
sys/dev/hme/if_hme_pci.c
View File

@ -120,16 +120,14 @@ hme_pci_attach(device_t dev)
{
struct hme_pci_softc *hsc = device_get_softc(dev);
struct hme_softc *sc = &hsc->hsc_hme;
u_int16_t csr;
int error;
/*
* enable io/memory-space accesses. this is kinda of gross; but
* the hme comes up with neither IO space enabled, or memory space.
* Enable memory-space and bus master accesses. This is kinda of
* gross; but the hme comes up with neither enabled.
*/
csr = pci_read_config(dev, PCIR_COMMAND, 2);
csr |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, csr, 2);
pci_enable_busmaster(dev);
pci_enable_io(dev, SYS_RES_MEMORY);
sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
sc->sc_dev = dev;