arm64: emulate swp/swpb instructions
Add another undefined instruction handler for compat32 and watch out for SWP/SWPB instructions. SWP/SWPB were deprecated in ARMv6 and declared obsolete in ARMv7, but this implementation is motivated by some proprietary software that still uses SWP/SWPB. Because it's deprecated, emulation is pushed back behind a sysctl that defaults to OFF in GENERIC so that it doesn't potentially adversely affect package builds; it's unknown whether software may test for a functional swp/swpb instruction with the desire of using it later, so we err on the side of caution to ensure we don't end up with swp/swpb use in freebsd/arm packages (which are built on aarch64). The EMUL_SWP config option may be used to enable emulation by default in environments where emulation is desired and won't really be turned off. Reviewed by: andrew, mmel (both earlier version) Sponsored by: Stormshield Sponsored by: Klara, Inc. Differential Revision: https://reviews.freebsd.org/D39667
This commit is contained in:
Kyle Evans
parent
d1cd0344f7
commit
4b500174dd
@ -34,6 +34,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/mutex.h>
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#include <sys/syscallsubr.h>
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#include <sys/ktr.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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#include <sys/sysproto.h>
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#include <machine/armreg.h>
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@ -55,6 +56,9 @@ _Static_assert(sizeof(struct siginfo32) == 64, "struct siginfo32 size incorrect"
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extern void freebsd32_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask);
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SYSCTL_NODE(_compat, OID_AUTO, arm, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
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"32-bit mode");
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/*
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* The first two fields of a ucontext_t are the signal mask and the machine
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* context. The next field is uc_link; we want to avoid destroying the link
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@ -39,14 +39,47 @@ __FBSDID("$FreeBSD$");
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#include <sys/queue.h>
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#include <sys/signal.h>
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#include <sys/signalvar.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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#include <machine/atomic.h>
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#include <machine/frame.h>
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#define _MD_WANT_SWAPWORD
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#include <machine/md_var.h>
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#include <machine/pcb.h>
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#include <machine/undefined.h>
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#include <machine/vmparam.h>
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#include <vm/vm.h>
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#include <vm/vm_extern.h>
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/* Low bit masked off */
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#define INSN_COND(insn) ((insn >> 28) & ~0x1)
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#define INSN_COND_INVERTED(insn) ((insn >> 28) & 0x1)
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#define INSN_COND_EQ 0x00 /* NE */
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#define INSN_COND_CS 0x02 /* CC */
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#define INSN_COND_MI 0x04 /* PL */
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#define INSN_COND_VS 0x06 /* VC */
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#define INSN_COND_HI 0x08 /* LS */
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#define INSN_COND_GE 0x0a /* LT */
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#define INSN_COND_GT 0x0c /* LE */
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#define INSN_COND_AL 0x0e /* Always */
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MALLOC_DEFINE(M_UNDEF, "undefhandler", "Undefined instruction handler data");
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#ifdef COMPAT_FREEBSD32
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#ifndef EMUL_SWP
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#define EMUL_SWP 0
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#endif
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SYSCTL_DECL(_compat_arm);
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static bool compat32_emul_swp = EMUL_SWP;
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SYSCTL_BOOL(_compat_arm, OID_AUTO, emul_swp,
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CTLFLAG_RWTUN | CTLFLAG_MPSAFE, &compat32_emul_swp, 0,
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"Enable SWP/SWPB emulation");
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#endif
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struct undef_handler {
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LIST_ENTRY(undef_handler) uh_link;
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undef_handler_t uh_handler;
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@ -88,6 +121,54 @@ id_aa64mmfr2_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame,
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return (0);
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}
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static bool
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arm_cond_match(uint32_t insn, struct trapframe *frame)
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{
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uint64_t spsr;
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uint32_t cond;
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bool invert;
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bool match;
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/*
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* Generally based on the function of the same name in NetBSD, though
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* condition bits left in their original position rather than shifting
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* over the low bit that indicates inversion for quicker sanity checking
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* against spec.
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*/
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spsr = frame->tf_spsr;
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cond = INSN_COND(insn);
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invert = INSN_COND_INVERTED(insn);
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switch (cond) {
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case INSN_COND_EQ:
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match = (spsr & PSR_Z) != 0;
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break;
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case INSN_COND_CS:
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match = (spsr & PSR_C) != 0;
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break;
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case INSN_COND_MI:
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match = (spsr & PSR_N) != 0;
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break;
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case INSN_COND_VS:
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match = (spsr & PSR_V) != 0;
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break;
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case INSN_COND_HI:
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match = (spsr & (PSR_C | PSR_Z)) == PSR_C;
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break;
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case INSN_COND_GE:
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match = (!(spsr & PSR_N) == !(spsr & PSR_V));
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break;
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case INSN_COND_GT:
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match = !(spsr & PSR_Z) && (!(spsr & PSR_N) == !(spsr & PSR_V));
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break;
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case INSN_COND_AL:
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match = true;
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break;
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}
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return (!match != !invert);
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}
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#ifdef COMPAT_FREEBSD32
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/* arm32 GDB breakpoints */
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#define GDB_BREAKPOINT 0xe6000011
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@ -113,6 +194,86 @@ gdb_trapper(vm_offset_t va, uint32_t insn, struct trapframe *frame,
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}
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return 0;
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}
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static int
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swp_emulate(vm_offset_t va, uint32_t insn, struct trapframe *frame,
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uint32_t esr)
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{
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ksiginfo_t ksi;
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struct thread *td;
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vm_offset_t vaddr;
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uint64_t *regs;
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uint32_t val;
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int attempts, error, Rn, Rd, Rm;
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bool is_swpb;
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td = curthread;
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/*
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* swp, swpb only; there are no Thumb swp/swpb instructions so we can
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* safely bail out if we're in Thumb mode.
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*/
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if (!compat32_emul_swp || !SV_PROC_FLAG(td->td_proc, SV_ILP32) ||
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(frame->tf_spsr & PSR_T) != 0)
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return (0);
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else if ((insn & 0x0fb00ff0) != 0x01000090)
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return (0);
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else if (!arm_cond_match(insn, frame))
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goto next; /* Handled, but does nothing */
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Rn = (insn & 0xf0000) >> 16;
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Rd = (insn & 0xf000) >> 12;
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Rm = (insn & 0xf);
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regs = frame->tf_x;
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vaddr = regs[Rn] & 0xffffffff;
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val = regs[Rm];
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/* Enforce alignment for swp. */
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is_swpb = (insn & 0x00400000) != 0;
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if (!is_swpb && (vaddr & 3) != 0)
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goto fault;
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attempts = 0;
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do {
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if (is_swpb) {
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uint8_t bval;
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bval = val;
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error = swapueword8((void *)vaddr, &bval);
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val = bval;
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} else {
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error = swapueword32((void *)vaddr, &val);
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}
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if (error == -1)
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goto fault;
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/*
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* Avoid potential DoS, e.g., on CPUs that don't implement
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* global monitors.
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*/
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if (error != 0 && (++attempts % 5) == 0)
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maybe_yield();
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} while (error != 0);
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regs[Rd] = val;
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next:
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/* No thumb SWP/SWPB */
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frame->tf_elr += 4; //INSN_SIZE;
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return (1);
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fault:
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ksiginfo_init_trap(&ksi);
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ksi.ksi_signo = SIGSEGV;
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ksi.ksi_code = SEGV_MAPERR;
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ksi.ksi_addr = (void *)va;
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trapsignal(td, &ksi);
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return (1);
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}
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#endif
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void
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@ -125,6 +286,7 @@ undef_init(void)
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install_undef_handler(false, id_aa64mmfr2_handler);
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#ifdef COMPAT_FREEBSD32
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install_undef_handler(true, gdb_trapper);
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install_undef_handler(true, swp_emulate);
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#endif
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}
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@ -14,6 +14,8 @@ PERTHREAD_SSP opt_global.h
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# Binary compatibility
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COMPAT_FREEBSD32 opt_global.h
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# Emulate SWP/SWPB for COMPAT_FREEBSD32
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EMUL_SWP opt_global.h
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# EFI Runtime services support
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EFIRT opt_efirt.h
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