arm/arm64 nvidia: Remove unused variables.
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c16bfb03cb
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4b9b6a501a
@ -261,9 +261,6 @@ as3722_parse_fdt(struct as3722_softc *sc, phandle_t node)
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static void
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as3722_intr(void *arg)
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{
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struct as3722_softc *sc;
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sc = (struct as3722_softc *)arg;
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/* XXX Finish temperature alarms. */
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}
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@ -285,16 +282,13 @@ static int
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as3722_attach(device_t dev)
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{
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struct as3722_softc *sc;
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const char *dname;
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int dunit, rv, rid;
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int rv, rid;
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phandle_t node;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->bus_addr = iicbus_get_addr(dev);
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node = ofw_bus_get_node(sc->dev);
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dname = device_get_name(dev);
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dunit = device_get_unit(dev);
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rv = 0;
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LOCK_INIT(sc);
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@ -381,10 +381,8 @@ as3722_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *out_flags)
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static int
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as3722_gpio_get_mode(struct as3722_softc *sc, uint32_t pin, uint32_t gpio_flags)
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{
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uint8_t ctrl;
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int flags;
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ctrl = sc->gpio_pins[pin]->pin_ctrl_reg;
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flags = sc->gpio_pins[pin]->pin_cfg_flags;
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/* Tristate mode. */
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@ -560,14 +560,11 @@ plle_enable(struct pll_sc *sc)
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{
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uint32_t reg;
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int rv;
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struct mnp_bits *mnp_bits;
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uint32_t pll_m = 1;
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uint32_t pll_n = 200;
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uint32_t pll_p = 13;
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uint32_t pll_cml = 13;
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mnp_bits = &sc->mnp_bits;
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/* Disable lock override. */
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RD4(sc, sc->base_reg, ®);
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reg &= ~PLLE_BASE_LOCK_OVERRIDE;
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@ -1030,7 +1027,6 @@ tegra124_pll_recalc(struct clknode *clk, uint64_t *freq)
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struct pll_sc *sc;
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uint32_t m, n, p, pr;
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uint32_t reg, misc_reg;
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int locked;
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sc = clknode_get_softc(clk);
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@ -1042,13 +1038,12 @@ tegra124_pll_recalc(struct clknode *clk, uint64_t *freq)
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p = reg_to_pdiv(sc, pr);
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else
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p = 2 * (pr - 1);
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locked = is_locked(sc);
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dprintf("%s: %s (0x%08x, 0x%08x) - m: %d, n: %d, p: %d (%d): "
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"e: %d, r: %d, o: %d - %s\n", __func__,
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clknode_get_name(clk), reg, misc_reg, m, n, p, pr,
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(reg >> 30) & 1, (reg >> 29) & 1, (reg >> 28) & 1,
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locked ? "locked" : "unlocked");
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is_locked(sc) ? "locked" : "unlocked");
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if ((m == 0) || (n == 0) || (p == 0)) {
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*freq = 0;
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@ -245,9 +245,6 @@ tegra124_coretemp_attach(device_t dev)
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static int
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tegra124_coretemp_detach(device_t dev)
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{
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struct tegra124_coretemp_softc *sc;
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sc = device_get_softc(dev);
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return (0);
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}
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@ -293,7 +293,7 @@ static int
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tegra124_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
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{
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struct tegra124_cpufreq_softc *sc;
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int i, j, max_cnt;
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int i, j;
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if (sets == NULL || count == NULL)
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return (EINVAL);
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@ -301,7 +301,6 @@ tegra124_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
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sc = device_get_softc(dev);
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memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count));
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max_cnt = min(sc->nspeed_points, *count);
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for (i = 0, j = sc->nspeed_points - 1; j >= 0; j--) {
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if (sc->cpu_max_freq < sc->speed_points[j].freq)
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continue;
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@ -334,7 +334,6 @@ tegra210_init(struct tegra_efuse_softc *sc, struct tegra_sku_info *sku)
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{
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int i, threshold, speedo_rev;
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uint32_t cpu_speedo[3], soc_speedo[3];
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uint32_t cpu_iddq, soc_iddq, gpu_iddq;
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cpu_speedo[0] = RD4(sc, TEGRA210_FUSE_CPU_SPEEDO_0);
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cpu_speedo[1] = RD4(sc, TEGRA210_FUSE_CPU_SPEEDO_1);
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@ -348,10 +347,6 @@ tegra210_init(struct tegra_efuse_softc *sc, struct tegra_sku_info *sku)
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sku->soc_iddq_value = RD4(sc, TEGRA210_FUSE_SOC_IDDQ);
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sku->gpu_iddq_value = RD4(sc, TEGRA210_FUSE_GPU_IDDQ);
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cpu_iddq = RD4(sc, TEGRA210_FUSE_CPU_IDDQ) * 4;
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soc_iddq = RD4(sc, TEGRA210_FUSE_SOC_IDDQ) * 4;
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gpu_iddq = RD4(sc, TEGRA210_FUSE_GPU_IDDQ) * 5;
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speedo_rev = tegra210_get_speedo_revision(sc);
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device_printf(sc->dev, " Speedo revision: %u\n", speedo_rev);
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@ -444,12 +439,10 @@ static int
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tegra_efuse_attach(device_t dev)
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{
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int rv, rid;
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phandle_t node;
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struct tegra_efuse_softc *sc;
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sc = device_get_softc(dev);
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sc->dev = dev;
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node = ofw_bus_get_node(dev);
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sc->soc = (struct efuse_soc *)ofw_bus_search_compatible(dev,
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compat_data)->ocd_data;
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@ -150,11 +150,9 @@ tegra_ehci_attach(device_t dev)
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ehci_softc_t *esc;
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int rv, rid;
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uint64_t freq;
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phandle_t node;
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sc = device_get_softc(dev);
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sc->dev = dev;
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node = ofw_bus_get_node(dev);
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esc = &sc->ehci_softc;
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/* Allocate resources. */
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@ -742,7 +742,6 @@ static int
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tegra_i2c_detach(device_t dev)
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{
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struct tegra_i2c_softc *sc;
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int rv;
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sc = device_get_softc(dev);
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tegra_i2c_hw_init(sc);
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@ -755,7 +754,7 @@ tegra_i2c_detach(device_t dev)
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LOCK_DESTROY(sc);
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if (sc->iicbus)
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rv = device_delete_child(dev, sc->iicbus);
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device_delete_child(dev, sc->iicbus);
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return (bus_generic_detach(dev));
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}
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@ -710,12 +710,6 @@ static int
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tegra_pcib_msi_setup_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct tegra_pcib_softc *sc;
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struct tegra_pcib_irqsrc *tgi;
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sc = device_get_softc(dev);
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tgi = (struct tegra_pcib_irqsrc *)isrc;
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if (data == NULL || data->type != INTR_MAP_DATA_MSI)
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return (ENOTSUP);
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@ -702,7 +702,6 @@ static int pinmux_configure(device_t dev, phandle_t cfgxref)
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{
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struct pinmux_softc *sc;
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phandle_t node, cfgnode;
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int rv;
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sc = device_get_softc(dev);
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cfgnode = OF_node_from_xref(cfgxref);
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@ -710,7 +709,7 @@ static int pinmux_configure(device_t dev, phandle_t cfgxref)
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for (node = OF_child(cfgnode); node != 0; node = OF_peer(node)) {
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if (!ofw_bus_node_status_okay(node))
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continue;
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rv = pinmux_process_node(sc, node);
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pinmux_process_node(sc, node);
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}
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return (0);
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}
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@ -383,16 +383,13 @@ static int
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max77620_attach(device_t dev)
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{
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struct max77620_softc *sc;
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const char *dname;
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int dunit, rv, rid;
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int rv, rid;
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phandle_t node;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->bus_addr = iicbus_get_addr(dev);
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node = ofw_bus_get_node(sc->dev);
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dname = device_get_name(dev);
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dunit = device_get_unit(dev);
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rv = 0;
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LOCK_INIT(sc);
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@ -753,13 +753,10 @@ plle_enable(struct pll_sc *sc)
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{
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uint32_t reg;
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int rv;
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struct mnp_bits *mnp_bits;
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uint32_t pll_m = 2;
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uint32_t pll_n = 125;
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uint32_t pll_cml = 14;
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mnp_bits = &sc->mnp_bits;
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/* Disable lock override. */
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RD4(sc, sc->base_reg, ®);
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reg &= ~PLLE_BASE_LOCK_OVERRIDE;
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@ -249,9 +249,6 @@ tegra210_coretemp_attach(device_t dev)
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static int
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tegra210_coretemp_detach(device_t dev)
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{
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struct tegra210_coretemp_softc *sc;
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sc = device_get_softc(dev);
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return (0);
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}
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@ -251,7 +251,7 @@ static int
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tegra210_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
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{
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struct tegra210_cpufreq_softc *sc;
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int i, j, max_cnt;
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int i, j;
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if (sets == NULL || count == NULL)
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return (EINVAL);
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@ -259,7 +259,6 @@ tegra210_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
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sc = device_get_softc(dev);
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memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count));
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max_cnt = min(sc->nspeed_points, *count);
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for (i = 0, j = sc->nspeed_points - 1; j >= 0; j--) {
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if (sc->cpu_max_freq < sc->speed_points[j].freq)
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continue;
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@ -669,7 +669,6 @@ static int pinmux_configure(device_t dev, phandle_t cfgxref)
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{
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struct pinmux_softc *sc;
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phandle_t node, cfgnode;
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int rv;
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sc = device_get_softc(dev);
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cfgnode = OF_node_from_xref(cfgxref);
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@ -678,7 +677,7 @@ static int pinmux_configure(device_t dev, phandle_t cfgxref)
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for (node = OF_child(cfgnode); node != 0; node = OF_peer(node)) {
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if (!ofw_bus_node_status_okay(node))
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continue;
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rv = pinmux_process_node(sc, node);
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pinmux_process_node(sc, node);
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}
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return (0);
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}
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@ -1745,7 +1745,6 @@ process_port(struct padctl_softc *sc, phandle_t node)
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{
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struct padctl_port *port;
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struct padctl_pad *pad;
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char *name;
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int rv;
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@ -1792,7 +1791,6 @@ process_port(struct padctl_softc *sc, phandle_t node)
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goto end;
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}
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pad = port->lane->pad;
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if (port->type == PADCTL_PORT_USB3) {
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rv = OF_getencprop(node, "nvidia,usb2-companion",
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&(port->companion), sizeof(port->companion));
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