Protect smbus ioctls in ig4 driver using a shared lock.
Document locking semantics. Differential Revision: https://reviews.freebsd.org/D2744 Reviewed by: jah, kib Approved by: kib
This commit is contained in:
Michael Gmelin
parent
7d379626b1
commit
4cd6abddcd
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=284803
@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$");
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* Intel fourth generation mobile cpus integrated I2C device, smbus driver.
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*
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* See ig4_reg.h for datasheet reference and notes.
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* See ig4_var.h for locking semantics.
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*/
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#include <sys/param.h>
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@ -49,6 +50,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/errno.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/sx.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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#include <sys/sysctl.h>
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@ -115,7 +117,7 @@ set_controller(ig4iic_softc_t *sc, uint32_t ctl)
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error = 0;
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break;
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}
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mtx_sleep(sc, &sc->mutex, 0, "i2cslv", 1);
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mtx_sleep(sc, &sc->io_lock, 0, "i2cslv", 1);
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}
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return (error);
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}
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@ -179,7 +181,7 @@ wait_status(ig4iic_softc_t *sc, uint32_t status)
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* work, otherwise poll with the lock held.
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*/
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if (status & IG4_STATUS_RX_NOTEMPTY) {
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mtx_sleep(sc, &sc->mutex, PZERO, "i2cwait",
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mtx_sleep(sc, &sc->io_lock, 0, "i2cwait",
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(hz + 99) / 100); /* sleep up to 10ms */
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count_us += 10000;
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} else {
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@ -522,6 +524,8 @@ ig4iic_attach(ig4iic_softc_t *sc)
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* Use a threshold of 1 so we get interrupted on each character,
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* allowing us to use mtx_sleep() in our poll code. Not perfect
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* but this is better than using DELAY() for receiving data.
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*
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* See ig4_var.h for details on interrupt handler synchronization.
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*/
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reg_write(sc, IG4_REG_RX_TL, 1);
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@ -551,12 +555,12 @@ ig4iic_attach(ig4iic_softc_t *sc)
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*/
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reg_write(sc, IG4_REG_INTR_MASK, IG4_INTR_STOP_DET |
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IG4_INTR_RX_FULL);
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mtx_lock(&sc->mutex);
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mtx_lock(&sc->io_lock);
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if (set_controller(sc, 0))
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device_printf(sc->dev, "controller error during attach-1\n");
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if (set_controller(sc, IG4_I2C_ENABLE))
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device_printf(sc->dev, "controller error during attach-2\n");
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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error = bus_setup_intr(sc->dev, sc->intr_res, INTR_TYPE_MISC | INTR_MPSAFE,
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NULL, ig4iic_intr, sc, &sc->intr_handle);
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if (error) {
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@ -615,7 +619,8 @@ ig4iic_detach(ig4iic_softc_t *sc)
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if (sc->intr_handle)
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bus_teardown_intr(sc->dev, sc->intr_res, sc->intr_handle);
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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sc->smb = NULL;
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sc->intr_handle = NULL;
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@ -623,18 +628,16 @@ ig4iic_detach(ig4iic_softc_t *sc)
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reg_read(sc, IG4_REG_CLR_INTR);
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set_controller(sc, 0);
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (0);
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}
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int
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ig4iic_smb_callback(device_t dev, int index, void *data)
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{
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ig4iic_softc_t *sc = device_get_softc(dev);
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int error;
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mtx_lock(&sc->mutex);
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switch (index) {
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case SMB_REQUEST_BUS:
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error = 0;
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@ -647,8 +650,6 @@ ig4iic_smb_callback(device_t dev, int index, void *data)
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break;
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}
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mtx_unlock(&sc->mutex);
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return (error);
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}
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@ -660,25 +661,8 @@ ig4iic_smb_callback(device_t dev, int index, void *data)
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int
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ig4iic_smb_quick(device_t dev, u_char slave, int how)
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{
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ig4iic_softc_t *sc = device_get_softc(dev);
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int error;
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mtx_lock(&sc->mutex);
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switch (how) {
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case SMB_QREAD:
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error = SMB_ENOTSUPP;
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break;
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case SMB_QWRITE:
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error = SMB_ENOTSUPP;
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break;
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default:
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error = SMB_ENOTSUPP;
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break;
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}
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mtx_unlock(&sc->mutex);
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return (error);
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return (SMB_ENOTSUPP);
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}
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/*
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@ -695,7 +679,8 @@ ig4iic_smb_sendb(device_t dev, u_char slave, char byte)
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uint32_t cmd;
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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cmd = byte;
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@ -706,7 +691,8 @@ ig4iic_smb_sendb(device_t dev, u_char slave, char byte)
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error = SMB_ETIMEOUT;
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}
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -721,7 +707,8 @@ ig4iic_smb_recvb(device_t dev, u_char slave, char *byte)
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ig4iic_softc_t *sc = device_get_softc(dev);
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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reg_write(sc, IG4_REG_DATA_CMD, IG4_DATA_COMMAND_RD);
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@ -733,7 +720,8 @@ ig4iic_smb_recvb(device_t dev, u_char slave, char *byte)
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error = SMB_ETIMEOUT;
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}
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -746,13 +734,15 @@ ig4iic_smb_writeb(device_t dev, u_char slave, char cmd, char byte)
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ig4iic_softc_t *sc = device_get_softc(dev);
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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error = smb_transaction(sc, cmd, SMB_TRANS_NOCNT,
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&byte, 1, NULL, 0, NULL);
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -766,7 +756,8 @@ ig4iic_smb_writew(device_t dev, u_char slave, char cmd, short word)
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char buf[2];
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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buf[0] = word & 0xFF;
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@ -774,7 +765,8 @@ ig4iic_smb_writew(device_t dev, u_char slave, char cmd, short word)
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error = smb_transaction(sc, cmd, SMB_TRANS_NOCNT,
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buf, 2, NULL, 0, NULL);
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -787,13 +779,15 @@ ig4iic_smb_readb(device_t dev, u_char slave, char cmd, char *byte)
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ig4iic_softc_t *sc = device_get_softc(dev);
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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error = smb_transaction(sc, cmd, SMB_TRANS_NOCNT,
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NULL, 0, byte, 1, NULL);
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -807,7 +801,8 @@ ig4iic_smb_readw(device_t dev, u_char slave, char cmd, short *word)
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char buf[2];
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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if ((error = smb_transaction(sc, cmd, SMB_TRANS_NOCNT,
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@ -815,7 +810,8 @@ ig4iic_smb_readw(device_t dev, u_char slave, char cmd, short *word)
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*word = (u_char)buf[0] | ((u_char)buf[1] << 8);
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}
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -831,7 +827,8 @@ ig4iic_smb_pcall(device_t dev, u_char slave, char cmd,
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char wbuf[2];
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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wbuf[0] = sdata & 0xFF;
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@ -841,7 +838,8 @@ ig4iic_smb_pcall(device_t dev, u_char slave, char cmd,
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*rdata = (u_char)rbuf[0] | ((u_char)rbuf[1] << 8);
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}
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -852,13 +850,15 @@ ig4iic_smb_bwrite(device_t dev, u_char slave, char cmd,
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ig4iic_softc_t *sc = device_get_softc(dev);
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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error = smb_transaction(sc, cmd, 0,
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buf, wcount, NULL, 0, NULL);
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -870,14 +870,16 @@ ig4iic_smb_bread(device_t dev, u_char slave, char cmd,
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int rcount = *countp_char;
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, 0);
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error = smb_transaction(sc, cmd, 0,
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NULL, 0, buf, rcount, &rcount);
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*countp_char = rcount;
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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@ -889,18 +891,20 @@ ig4iic_smb_trans(device_t dev, int slave, char cmd, int op,
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ig4iic_softc_t *sc = device_get_softc(dev);
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int error;
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mtx_lock(&sc->mutex);
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sx_xlock(&sc->call_lock);
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mtx_lock(&sc->io_lock);
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set_slave_addr(sc, slave, op);
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error = smb_transaction(sc, cmd, op,
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wbuf, wcount, rbuf, rcount, actualp);
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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sx_xunlock(&sc->call_lock);
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return (error);
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}
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/*
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* Interrupt Operation
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* Interrupt Operation, see ig4_var.h for locking semantics.
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*/
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static void
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ig4iic_intr(void *cookie)
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@ -908,7 +912,7 @@ ig4iic_intr(void *cookie)
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ig4iic_softc_t *sc = cookie;
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uint32_t status;
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mtx_lock(&sc->mutex);
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mtx_lock(&sc->io_lock);
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/* reg_write(sc, IG4_REG_INTR_MASK, IG4_INTR_STOP_DET);*/
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status = reg_read(sc, IG4_REG_I2C_STA);
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while (status & IG4_STATUS_RX_NOTEMPTY) {
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@ -919,7 +923,7 @@ ig4iic_intr(void *cookie)
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}
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reg_read(sc, IG4_REG_CLR_INTR);
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wakeup(sc);
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mtx_unlock(&sc->mutex);
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mtx_unlock(&sc->io_lock);
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}
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#define REGDUMP(sc, reg) \
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@ -49,6 +49,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/errno.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/sx.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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@ -94,7 +95,8 @@ ig4iic_pci_attach(device_t dev)
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bzero(sc, sizeof(*sc));
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mtx_init(&sc->mutex, device_get_nameunit(dev), "ig4iic", MTX_DEF);
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mtx_init(&sc->io_lock, "IG4 I/O lock", NULL, MTX_DEF);
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sx_init(&sc->call_lock, "IG4 call lock");
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sc->dev = dev;
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sc->regs_rid = PCIR_BAR(0);
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@ -150,7 +152,10 @@ ig4iic_pci_detach(device_t dev)
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sc->regs_rid, sc->regs_res);
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sc->regs_res = NULL;
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}
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mtx_destroy(&sc->mutex);
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if (mtx_initialized(&sc->io_lock)) {
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mtx_destroy(&sc->io_lock);
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sx_destroy(&sc->call_lock);
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}
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return (0);
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}
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@ -179,9 +184,9 @@ static device_method_t ig4iic_pci_methods[] = {
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};
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static driver_t ig4iic_pci_driver = {
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"ig4iic",
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ig4iic_pci_methods,
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sizeof(struct ig4iic_softc)
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"ig4iic",
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ig4iic_pci_methods,
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sizeof(struct ig4iic_softc)
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};
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static devclass_t ig4iic_pci_devclass;
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@ -70,7 +70,30 @@ struct ig4iic_softc {
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int slave_valid : 1;
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int read_started : 1;
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int write_started : 1;
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struct mtx mutex;
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/*
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* Locking semantics:
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*
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* Functions implementing the smbus interface that interact
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* with the controller acquire an exclusive lock on call_lock
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* to prevent interleaving of calls to the interface and a lock on
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* io_lock right afterwards, to synchronize controller I/O activity.
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*
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* The interrupt handler can only read data while no ig4iic_smb_* call
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* is in progress or while io_lock is dropped during mtx_sleep in
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* wait_status and set_controller. It is safe to drop io_lock in those
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* places, because the interrupt handler only accesses those registers:
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*
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* - IG4_REG_I2C_STA (I2C Status)
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* - IG4_REG_DATA_CMD (Data Buffer and Command)
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* - IG4_REG_CLR_INTR (Clear Interrupt)
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*
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* Locking outside of those places is required to make the content
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* of rpos/rnext predictable (e.g. whenever data_read is called and in
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* smb_transaction).
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*/
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struct sx call_lock;
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struct mtx io_lock;
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};
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typedef struct ig4iic_softc ig4iic_softc_t;
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