Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge
I/O windows, the default is to preserve the firmware-assigned resources. PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture defines a PCI_RES_BUS resource type. - Add a helper API to create top-level PCI bus resource managers for each PCI domain/segment. Host-PCI bridge drivers use this API to allocate bus numbers from their associated domain. - Change the PCI bus and CardBus drivers to allocate a bus resource for their bus number from the parent PCI bridge device. - Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the full range of bus numbers from secbus to subbus from their parent bridge. The drivers also always program their primary bus register. The bridge drivers also support growing their bus range by extending the bus resource and updating subbus to match the larger range. - Add support for managing PCI bus resources to the Host-PCI bridge drivers used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib). - Define a PCI_RES_BUS resource type for amd64 and i386. Reviewed by: imp MFC after: 1 month
This commit is contained in:
John Baldwin
parent
ff9a07fa97
commit
4edef187b8
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=261790
@ -40,5 +40,8 @@
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#define SYS_RES_DRQ 2 /* isa dma lines */
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#define SYS_RES_MEMORY 3 /* i/o memory */
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#define SYS_RES_IOPORT 4 /* i/o ports */
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#ifdef NEW_PCIB
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#define PCI_RES_BUS 5 /* PCI bus numbers */
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#endif
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#endif /* !_MACHINE_RESOURCE_H_ */
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@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
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#include <dev/acpica/acpivar.h>
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#include <machine/pci_cfgreg.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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@ -96,6 +97,11 @@ static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
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static int acpi_pcib_acpi_adjust_resource(device_t dev,
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device_t child, int type, struct resource *r,
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u_long start, u_long end);
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#ifdef PCI_RES_BUS
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static int acpi_pcib_acpi_release_resource(device_t dev,
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device_t child, int type, int rid,
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struct resource *r);
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#endif
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#endif
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static device_method_t acpi_pcib_acpi_methods[] = {
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@ -115,7 +121,11 @@ static device_method_t acpi_pcib_acpi_methods[] = {
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#else
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DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
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#endif
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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DEVMETHOD(bus_release_resource, acpi_pcib_acpi_release_resource),
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#else
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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#endif
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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@ -271,6 +281,20 @@ acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
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}
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#endif
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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static int
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first_decoded_bus(struct acpi_hpcib_softc *sc, u_long *startp)
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{
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struct resource_list_entry *rle;
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rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0);
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if (rle == NULL)
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return (ENXIO);
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*startp = rle->start;
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return (0);
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}
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#endif
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static int
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acpi_pcib_acpi_attach(device_t dev)
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{
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@ -278,6 +302,11 @@ acpi_pcib_acpi_attach(device_t dev)
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ACPI_STATUS status;
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static int bus0_seen = 0;
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u_int slot, func, busok;
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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struct resource *bus_res;
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u_long start;
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int rid;
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#endif
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uint8_t busno;
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ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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@ -389,6 +418,39 @@ acpi_pcib_acpi_attach(device_t dev)
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}
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}
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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/*
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* If nothing else worked, hope that ACPI at least lays out the
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* Host-PCI bridges in order and that as a result the next free
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* bus number is our bus number.
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*/
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if (busok == 0) {
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/*
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* If we have a region of bus numbers, use the first
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* number for our bus.
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*/
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if (first_decoded_bus(sc, &start) == 0)
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sc->ap_bus = start;
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else {
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rid = 0;
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bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0,
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PCI_BUSMAX, 1, 0);
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if (bus_res == NULL) {
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device_printf(dev,
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"could not allocate bus number\n");
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pcib_host_res_free(dev, &sc->ap_host_res);
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return (ENXIO);
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}
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sc->ap_bus = rman_get_start(bus_res);
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pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res);
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}
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} else {
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#ifdef INVARIANTS
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if (first_decoded_bus(sc, &start) == 0)
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KASSERT(start == sc->ap_bus, ("bus number mismatch"));
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#endif
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}
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#else
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/*
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* If nothing else worked, hope that ACPI at least lays out the
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* host-PCI bridges in order and that as a result our unit number
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@ -399,6 +461,7 @@ acpi_pcib_acpi_attach(device_t dev)
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sc->ap_bus = device_get_unit(dev);
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device_printf(dev, "trying bus number %d\n", sc->ap_bus);
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}
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#endif
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/* If this is bus 0 on segment 0, note that it has been seen already. */
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if (sc->ap_segment == 0 && sc->ap_bus == 0)
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@ -534,6 +597,11 @@ acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
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#ifdef NEW_PCIB
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sc = device_get_softc(dev);
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#ifdef PCI_RES_BUS
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if (type == PCI_RES_BUS)
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return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end,
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count, flags));
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#endif
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res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
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count, flags);
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@ -562,7 +630,26 @@ acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type,
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struct acpi_hpcib_softc *sc;
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sc = device_get_softc(dev);
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#ifdef PCI_RES_BUS
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if (type == PCI_RES_BUS)
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return (pci_domain_adjust_bus(sc->ap_segment, child, r, start,
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end));
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#endif
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return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start,
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end));
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}
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#ifdef PCI_RES_BUS
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int
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acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r)
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{
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struct acpi_hpcib_softc *sc;
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sc = device_get_softc(dev);
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if (type == PCI_RES_BUS)
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return (pci_domain_release_bus(sc->ap_segment, child, rid, r));
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return (bus_generic_release_resource(dev, child, type, rid, r));
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}
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#endif
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#endif
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@ -120,7 +120,7 @@ acpi_pcib_pci_attach(device_t dev)
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pcib_attach_common(dev);
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sc = device_get_softc(dev);
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sc->ap_handle = acpi_get_handle(dev);
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return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_pcibsc.secbus));
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return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_pcibsc.bus.sec));
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}
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static int
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@ -96,17 +96,36 @@ static int
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cardbus_attach(device_t cbdev)
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{
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struct cardbus_softc *sc;
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#ifdef PCI_RES_BUS
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int rid;
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#endif
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sc = device_get_softc(cbdev);
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sc->sc_dev = cbdev;
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#ifdef PCI_RES_BUS
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rid = 0;
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sc->sc_bus = bus_alloc_resource(cbdev, PCI_RES_BUS, &rid,
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pcib_get_bus(cbdev), pcib_get_bus(cbdev), 1, 0);
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if (sc->sc_bus == NULL) {
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device_printf(cbdev, "failed to allocate bus number\n");
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return (ENXIO);
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}
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#endif
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return (0);
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}
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static int
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cardbus_detach(device_t cbdev)
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{
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#ifdef PCI_RES_BUS
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struct cardbus_softc *sc;
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#endif
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cardbus_detach_card(cbdev);
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#ifdef PCI_RES_BUS
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sc = device_get_softc(cbdev);
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(void)bus_release_resource(cbdev, PCI_RES_BUS, 0, sc->sc_bus);
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#endif
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return (0);
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}
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@ -69,6 +69,9 @@ struct cardbus_devinfo
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struct cardbus_softc
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{
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device_t sc_dev;
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#ifdef PCI_RES_BUS
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struct resource *sc_bus;
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#endif
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};
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/*
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@ -97,6 +97,7 @@ __FBSDID("$FreeBSD$");
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include <dev/pccard/pccardreg.h>
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#include <dev/pccard/pccardvar.h>
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@ -1548,7 +1549,7 @@ cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
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*result = sc->domain;
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return (0);
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case PCIB_IVAR_BUS:
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*result = sc->secbus;
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*result = sc->bus.sec;
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return (0);
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}
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return (ENOENT);
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@ -1557,14 +1558,12 @@ cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
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int
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cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
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{
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struct cbb_softc *sc = device_get_softc(brdev);
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switch (which) {
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case PCIB_IVAR_DOMAIN:
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return (EINVAL);
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case PCIB_IVAR_BUS:
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sc->secbus = value;
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return (0);
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return (EINVAL);
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}
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return (ENOENT);
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}
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@ -51,6 +51,9 @@ __FBSDID("$FreeBSD$");
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#include <isa/isavar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include <dev/pccard/pccardreg.h>
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#include <dev/pccard/pccardvar.h>
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@ -93,6 +93,7 @@ __FBSDID("$FreeBSD$");
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include <dev/pccard/pccardreg.h>
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#include <dev/pccard/pccardvar.h>
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@ -303,13 +304,15 @@ cbb_print_config(device_t dev)
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static int
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cbb_pci_attach(device_t brdev)
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{
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#if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
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static int curr_bus_number = 2; /* XXX EVILE BAD (see below) */
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uint32_t pribus;
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#endif
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struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev);
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struct sysctl_ctx_list *sctx;
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struct sysctl_oid *soid;
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int rid;
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device_t parent;
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uint32_t pribus;
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parent = device_get_parent(brdev);
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mtx_init(&sc->mtx, device_get_nameunit(brdev), "cbb", MTX_DEF);
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@ -318,9 +321,13 @@ cbb_pci_attach(device_t brdev)
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sc->cbdev = NULL;
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sc->exca[0].pccarddev = NULL;
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sc->domain = pci_get_domain(brdev);
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sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
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sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
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sc->bus.sec = pci_read_config(brdev, PCIR_SECBUS_2, 1);
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sc->bus.sub = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
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sc->pribus = pcib_get_bus(parent);
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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pci_write_config(brdev, PCIR_PRIBUS_2, sc->pribus, 1);
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pcib_setup_secbus(brdev, &sc->bus, 1);
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#endif
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SLIST_INIT(&sc->rl);
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cbb_powerstate_d0(brdev);
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@ -352,9 +359,9 @@ cbb_pci_attach(device_t brdev)
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SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
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CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
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SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
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CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number");
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CTLFLAG_RD, &sc->bus.sec, 0, "Secondary bus number");
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SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
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CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number");
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CTLFLAG_RD, &sc->bus.sub, 0, "Subordinate bus number");
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#if 0
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SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "memory",
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CTLFLAG_RD, &sc->subbus, 0, "Memory window open");
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@ -366,15 +373,16 @@ cbb_pci_attach(device_t brdev)
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CTLFLAG_RD, &sc->subbus, 0, "io range 2 open");
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#endif
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#if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
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/*
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* This is a gross hack. We should be scanning the entire pci
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* tree, assigning bus numbers in a way such that we (1) can
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* reserve 1 extra bus just in case and (2) all sub busses
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* are in an appropriate range.
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*/
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DEVPRINTF((brdev, "Secondary bus is %d\n", sc->secbus));
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DEVPRINTF((brdev, "Secondary bus is %d\n", sc->bus.sec));
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pribus = pci_read_config(brdev, PCIR_PRIBUS_2, 1);
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if (sc->secbus == 0 || sc->pribus != pribus) {
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if (sc->bus.sec == 0 || sc->pribus != pribus) {
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if (curr_bus_number <= sc->pribus)
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curr_bus_number = sc->pribus + 1;
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if (pribus != sc->pribus) {
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@ -382,13 +390,14 @@ cbb_pci_attach(device_t brdev)
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sc->pribus));
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pci_write_config(brdev, PCIR_PRIBUS_2, sc->pribus, 1);
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}
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sc->secbus = curr_bus_number++;
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sc->subbus = curr_bus_number++;
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sc->bus.sec = curr_bus_number++;
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sc->bus.sub = curr_bus_number++;
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DEVPRINTF((brdev, "Secondary bus set to %d subbus %d\n",
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sc->secbus, sc->subbus));
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pci_write_config(brdev, PCIR_SECBUS_2, sc->secbus, 1);
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pci_write_config(brdev, PCIR_SUBBUS_2, sc->subbus, 1);
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sc->bus.sec, sc->bus.sub));
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pci_write_config(brdev, PCIR_SECBUS_2, sc->bus.sec, 1);
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pci_write_config(brdev, PCIR_SUBBUS_2, sc->bus.sub, 1);
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}
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#endif
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/* attach children */
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sc->cbdev = device_add_child(brdev, "cardbus", -1);
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@ -467,8 +476,8 @@ cbb_chipinit(struct cbb_softc *sc)
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/* Restore bus configuration */
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pci_write_config(sc->dev, PCIR_PRIBUS_2, sc->pribus, 1);
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pci_write_config(sc->dev, PCIR_SECBUS_2, sc->secbus, 1);
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pci_write_config(sc->dev, PCIR_SUBBUS_2, sc->subbus, 1);
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pci_write_config(sc->dev, PCIR_SECBUS_2, sc->bus.sec, 1);
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pci_write_config(sc->dev, PCIR_SUBBUS_2, sc->bus.sub, 1);
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/* Enable memory access */
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pci_enable_busmaster(sc->dev);
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@ -783,6 +792,58 @@ cbb_pci_filt(void *arg)
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return retval;
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}
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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static struct resource *
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cbb_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct cbb_softc *sc;
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sc = device_get_softc(bus);
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if (type == PCI_RES_BUS)
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return (pcib_alloc_subbus(&sc->bus, child, rid, start, end,
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count, flags));
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return (cbb_alloc_resource(bus, child, type, rid, start, end, count,
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flags));
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}
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static int
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cbb_pci_adjust_resource(device_t bus, device_t child, int type,
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struct resource *r, u_long start, u_long end)
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{
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struct cbb_softc *sc;
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sc = device_get_softc(bus);
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if (type == PCI_RES_BUS) {
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if (!rman_is_region_manager(r, &sc->bus.rman))
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return (EINVAL);
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return (rman_adjust_resource(r, start, end));
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}
|
||||
return (bus_generic_adjust_resource(bus, child, type, r, start, end));
|
||||
}
|
||||
|
||||
static int
|
||||
cbb_pci_release_resource(device_t bus, device_t child, int type, int rid,
|
||||
struct resource *r)
|
||||
{
|
||||
struct cbb_softc *sc;
|
||||
int error;
|
||||
|
||||
sc = device_get_softc(bus);
|
||||
if (type == PCI_RES_BUS) {
|
||||
if (!rman_is_region_manager(r, &sc->bus.rman))
|
||||
return (EINVAL);
|
||||
if (rman_get_flags(r) & RF_ACTIVE) {
|
||||
error = bus_deactivate_resource(child, type, rid, r);
|
||||
if (error)
|
||||
return (error);
|
||||
}
|
||||
return (rman_release_resource(r));
|
||||
}
|
||||
return (cbb_release_resource(bus, child, type, rid, r));
|
||||
}
|
||||
#endif
|
||||
|
||||
/************************************************************************/
|
||||
/* PCI compat methods */
|
||||
/************************************************************************/
|
||||
@ -826,8 +887,14 @@ static device_method_t cbb_methods[] = {
|
||||
/* bus methods */
|
||||
DEVMETHOD(bus_read_ivar, cbb_read_ivar),
|
||||
DEVMETHOD(bus_write_ivar, cbb_write_ivar),
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
DEVMETHOD(bus_alloc_resource, cbb_pci_alloc_resource),
|
||||
DEVMETHOD(bus_adjust_resource, cbb_pci_adjust_resource),
|
||||
DEVMETHOD(bus_release_resource, cbb_pci_release_resource),
|
||||
#else
|
||||
DEVMETHOD(bus_alloc_resource, cbb_alloc_resource),
|
||||
DEVMETHOD(bus_release_resource, cbb_release_resource),
|
||||
#endif
|
||||
DEVMETHOD(bus_activate_resource, cbb_activate_resource),
|
||||
DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource),
|
||||
DEVMETHOD(bus_driver_added, cbb_driver_added),
|
||||
|
||||
@ -64,8 +64,7 @@ struct cbb_softc {
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t domain;
|
||||
unsigned int pribus;
|
||||
unsigned int secbus;
|
||||
unsigned int subbus;
|
||||
struct pcib_secbus bus;
|
||||
struct mtx mtx;
|
||||
int cardok;
|
||||
u_int32_t flags;
|
||||
|
||||
@ -92,6 +92,9 @@ static int pci_add_map(device_t bus, device_t dev, int reg,
|
||||
struct resource_list *rl, int force, int prefetch);
|
||||
static int pci_probe(device_t dev);
|
||||
static int pci_attach(device_t dev);
|
||||
#ifdef PCI_RES_BUS
|
||||
static int pci_detach(device_t dev);
|
||||
#endif
|
||||
static void pci_load_vendor_data(void);
|
||||
static int pci_describe_parse_line(char **ptr, int *vendor,
|
||||
int *device, char **desc);
|
||||
@ -125,7 +128,11 @@ static device_method_t pci_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, pci_probe),
|
||||
DEVMETHOD(device_attach, pci_attach),
|
||||
#ifdef PCI_RES_BUS
|
||||
DEVMETHOD(device_detach, pci_detach),
|
||||
#else
|
||||
DEVMETHOD(device_detach, bus_generic_detach),
|
||||
#endif
|
||||
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||
DEVMETHOD(device_suspend, pci_suspend),
|
||||
DEVMETHOD(device_resume, pci_resume),
|
||||
@ -337,6 +344,13 @@ TUNABLE_INT("hw.pci.clear_bars", &pci_clear_bars);
|
||||
SYSCTL_INT(_hw_pci, OID_AUTO, clear_bars, CTLFLAG_RDTUN, &pci_clear_bars, 0,
|
||||
"Ignore firmware-assigned resources for BARs.");
|
||||
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
static int pci_clear_buses;
|
||||
TUNABLE_INT("hw.pci.clear_buses", &pci_clear_buses);
|
||||
SYSCTL_INT(_hw_pci, OID_AUTO, clear_buses, CTLFLAG_RDTUN, &pci_clear_buses, 0,
|
||||
"Ignore firmware-assigned bus numbers.");
|
||||
#endif
|
||||
|
||||
static int
|
||||
pci_has_quirk(uint32_t devid, int quirk)
|
||||
{
|
||||
@ -3197,6 +3211,164 @@ xhci_early_takeover(device_t self)
|
||||
bus_release_resource(self, SYS_RES_MEMORY, rid, res);
|
||||
}
|
||||
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
static void
|
||||
pci_reserve_secbus(device_t bus, device_t dev, pcicfgregs *cfg,
|
||||
struct resource_list *rl)
|
||||
{
|
||||
struct resource *res;
|
||||
char *cp;
|
||||
u_long start, end, count;
|
||||
int rid, sec_bus, sec_reg, sub_bus, sub_reg, sup_bus;
|
||||
|
||||
switch (cfg->hdrtype & PCIM_HDRTYPE) {
|
||||
case PCIM_HDRTYPE_BRIDGE:
|
||||
sec_reg = PCIR_SECBUS_1;
|
||||
sub_reg = PCIR_SUBBUS_1;
|
||||
break;
|
||||
case PCIM_HDRTYPE_CARDBUS:
|
||||
sec_reg = PCIR_SECBUS_2;
|
||||
sub_reg = PCIR_SUBBUS_2;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* If the existing bus range is valid, attempt to reserve it
|
||||
* from our parent. If this fails for any reason, clear the
|
||||
* secbus and subbus registers.
|
||||
*
|
||||
* XXX: Should we reset sub_bus to sec_bus if it is < sec_bus?
|
||||
* This would at least preserve the existing sec_bus if it is
|
||||
* valid.
|
||||
*/
|
||||
sec_bus = PCI_READ_CONFIG(bus, dev, sec_reg, 1);
|
||||
sub_bus = PCI_READ_CONFIG(bus, dev, sub_reg, 1);
|
||||
|
||||
/* Quirk handling. */
|
||||
switch (pci_get_devid(dev)) {
|
||||
case 0x12258086: /* Intel 82454KX/GX (Orion) */
|
||||
sup_bus = pci_read_config(dev, 0x41, 1);
|
||||
if (sup_bus != 0xff) {
|
||||
sec_bus = sup_bus + 1;
|
||||
sub_bus = sup_bus + 1;
|
||||
PCI_WRITE_CONFIG(bus, dev, sec_reg, sec_bus, 1);
|
||||
PCI_WRITE_CONFIG(bus, dev, sub_reg, sub_bus, 1);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x00dd10de:
|
||||
/* Compaq R3000 BIOS sets wrong subordinate bus number. */
|
||||
if ((cp = getenv("smbios.planar.maker")) == NULL)
|
||||
break;
|
||||
if (strncmp(cp, "Compal", 6) != 0) {
|
||||
freeenv(cp);
|
||||
break;
|
||||
}
|
||||
freeenv(cp);
|
||||
if ((cp = getenv("smbios.planar.product")) == NULL)
|
||||
break;
|
||||
if (strncmp(cp, "08A0", 4) != 0) {
|
||||
freeenv(cp);
|
||||
break;
|
||||
}
|
||||
freeenv(cp);
|
||||
if (sub_bus < 0xa) {
|
||||
sub_bus = 0xa;
|
||||
PCI_WRITE_CONFIG(bus, dev, sub_reg, sub_bus, 1);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if (bootverbose)
|
||||
printf("\tsecbus=%d, subbus=%d\n", sec_bus, sub_bus);
|
||||
if (sec_bus > 0 && sub_bus >= sec_bus) {
|
||||
start = sec_bus;
|
||||
end = sub_bus;
|
||||
count = end - start + 1;
|
||||
|
||||
resource_list_add(rl, PCI_RES_BUS, 0, 0ul, ~0ul, count);
|
||||
|
||||
/*
|
||||
* If requested, clear secondary bus registers in
|
||||
* bridge devices to force a complete renumbering
|
||||
* rather than reserving the existing range. However,
|
||||
* preserve the existing size.
|
||||
*/
|
||||
if (pci_clear_buses)
|
||||
goto clear;
|
||||
|
||||
rid = 0;
|
||||
res = resource_list_reserve(rl, bus, dev, PCI_RES_BUS, &rid,
|
||||
start, end, count, 0);
|
||||
if (res != NULL)
|
||||
return;
|
||||
|
||||
if (bootverbose)
|
||||
device_printf(bus,
|
||||
"pci%d:%d:%d:%d secbus failed to allocate\n",
|
||||
pci_get_domain(dev), pci_get_bus(dev),
|
||||
pci_get_slot(dev), pci_get_function(dev));
|
||||
}
|
||||
|
||||
clear:
|
||||
PCI_WRITE_CONFIG(bus, dev, sec_reg, 0, 1);
|
||||
PCI_WRITE_CONFIG(bus, dev, sub_reg, 0, 1);
|
||||
}
|
||||
|
||||
static struct resource *
|
||||
pci_alloc_secbus(device_t dev, device_t child, int *rid, u_long start,
|
||||
u_long end, u_long count, u_int flags)
|
||||
{
|
||||
struct pci_devinfo *dinfo;
|
||||
pcicfgregs *cfg;
|
||||
struct resource_list *rl;
|
||||
struct resource *res;
|
||||
int sec_reg, sub_reg;
|
||||
|
||||
dinfo = device_get_ivars(child);
|
||||
cfg = &dinfo->cfg;
|
||||
rl = &dinfo->resources;
|
||||
switch (cfg->hdrtype & PCIM_HDRTYPE) {
|
||||
case PCIM_HDRTYPE_BRIDGE:
|
||||
sec_reg = PCIR_SECBUS_1;
|
||||
sub_reg = PCIR_SUBBUS_1;
|
||||
break;
|
||||
case PCIM_HDRTYPE_CARDBUS:
|
||||
sec_reg = PCIR_SECBUS_2;
|
||||
sub_reg = PCIR_SUBBUS_2;
|
||||
break;
|
||||
default:
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
if (*rid != 0)
|
||||
return (NULL);
|
||||
|
||||
if (resource_list_find(rl, PCI_RES_BUS, *rid) == NULL)
|
||||
resource_list_add(rl, PCI_RES_BUS, *rid, start, end, count);
|
||||
if (!resource_list_reserved(rl, PCI_RES_BUS, *rid)) {
|
||||
res = resource_list_reserve(rl, dev, child, PCI_RES_BUS, rid,
|
||||
start, end, count, flags & ~RF_ACTIVE);
|
||||
if (res == NULL) {
|
||||
resource_list_delete(rl, PCI_RES_BUS, *rid);
|
||||
device_printf(child, "allocating %lu bus%s failed\n",
|
||||
count, count == 1 ? "" : "es");
|
||||
return (NULL);
|
||||
}
|
||||
if (bootverbose)
|
||||
device_printf(child,
|
||||
"Lazy allocation of %lu bus%s at %lu\n", count,
|
||||
count == 1 ? "" : "es", rman_get_start(res));
|
||||
PCI_WRITE_CONFIG(dev, child, sec_reg, rman_get_start(res), 1);
|
||||
PCI_WRITE_CONFIG(dev, child, sub_reg, rman_get_end(res), 1);
|
||||
}
|
||||
return (resource_list_alloc(rl, dev, child, PCI_RES_BUS, rid, start,
|
||||
end, count, flags));
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
pci_add_resources(device_t bus, device_t dev, int force, uint32_t prefetchmask)
|
||||
{
|
||||
@ -3269,6 +3441,14 @@ pci_add_resources(device_t bus, device_t dev, int force, uint32_t prefetchmask)
|
||||
else if (pci_get_progif(dev) == PCIP_SERIALBUS_USB_UHCI)
|
||||
uhci_early_takeover(dev);
|
||||
}
|
||||
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
/*
|
||||
* Reserve resources for secondary bus ranges behind bridge
|
||||
* devices.
|
||||
*/
|
||||
pci_reserve_secbus(bus, dev, cfg, rl);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
@ -3334,10 +3514,22 @@ pci_attach_common(device_t dev)
|
||||
#ifdef PCI_DMA_BOUNDARY
|
||||
int error, tag_valid;
|
||||
#endif
|
||||
#ifdef PCI_RES_BUS
|
||||
int rid;
|
||||
#endif
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
domain = pcib_get_domain(dev);
|
||||
busno = pcib_get_bus(dev);
|
||||
#ifdef PCI_RES_BUS
|
||||
rid = 0;
|
||||
sc->sc_bus = bus_alloc_resource(dev, PCI_RES_BUS, &rid, busno, busno,
|
||||
1, 0);
|
||||
if (sc->sc_bus == NULL) {
|
||||
device_printf(dev, "failed to allocate bus number\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
#endif
|
||||
if (bootverbose)
|
||||
device_printf(dev, "domain=%d, physical bus=%d\n",
|
||||
domain, busno);
|
||||
@ -3382,6 +3574,21 @@ pci_attach(device_t dev)
|
||||
return (bus_generic_attach(dev));
|
||||
}
|
||||
|
||||
#ifdef PCI_RES_BUS
|
||||
static int
|
||||
pci_detach(device_t dev)
|
||||
{
|
||||
struct pci_softc *sc;
|
||||
int error;
|
||||
|
||||
error = bus_generic_detach(dev);
|
||||
if (error)
|
||||
return (error);
|
||||
sc = device_get_softc(dev);
|
||||
return (bus_release_resource(dev, PCI_RES_BUS, 0, sc->sc_bus));
|
||||
}
|
||||
#endif
|
||||
|
||||
static void
|
||||
pci_set_power_children(device_t dev, device_t *devlist, int numdevs,
|
||||
int state)
|
||||
@ -3879,6 +4086,10 @@ pci_child_detached(device_t dev, device_t child)
|
||||
pci_printf(&dinfo->cfg, "Device leaked memory resources\n");
|
||||
if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0)
|
||||
pci_printf(&dinfo->cfg, "Device leaked I/O resources\n");
|
||||
#ifdef PCI_RES_BUS
|
||||
if (resource_list_release_active(rl, dev, child, PCI_RES_BUS) != 0)
|
||||
pci_printf(&dinfo->cfg, "Device leaked PCI bus numbers\n");
|
||||
#endif
|
||||
|
||||
pci_cfg_save(child, dinfo, 1);
|
||||
}
|
||||
@ -4295,6 +4506,11 @@ pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
||||
rl = &dinfo->resources;
|
||||
cfg = &dinfo->cfg;
|
||||
switch (type) {
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
case PCI_RES_BUS:
|
||||
return (pci_alloc_secbus(dev, child, rid, start, end, count,
|
||||
flags));
|
||||
#endif
|
||||
case SYS_RES_IRQ:
|
||||
/*
|
||||
* Can't alloc legacy interrupt once MSI messages have
|
||||
|
||||
@ -119,6 +119,10 @@ pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
|
||||
{
|
||||
|
||||
switch (type) {
|
||||
#ifdef PCI_RES_BUS
|
||||
case PCI_RES_BUS:
|
||||
return (rman_is_region_manager(r, &sc->bus.rman));
|
||||
#endif
|
||||
case SYS_RES_IOPORT:
|
||||
return (rman_is_region_manager(r, &sc->io.rman));
|
||||
case SYS_RES_MEMORY:
|
||||
@ -523,6 +527,173 @@ pcib_probe_windows(struct pcib_softc *sc)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef PCI_RES_BUS
|
||||
/*
|
||||
* Allocate a suitable secondary bus for this bridge if needed and
|
||||
* initialize the resource manager for the secondary bus range. Note
|
||||
* that the minimum count is a desired value and this may allocate a
|
||||
* smaller range.
|
||||
*/
|
||||
void
|
||||
pcib_setup_secbus(device_t dev, struct pcib_secbus *bus, int min_count)
|
||||
{
|
||||
char buf[64];
|
||||
int error, rid;
|
||||
|
||||
switch (pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) {
|
||||
case PCIM_HDRTYPE_BRIDGE:
|
||||
bus->sub_reg = PCIR_SUBBUS_1;
|
||||
break;
|
||||
case PCIM_HDRTYPE_CARDBUS:
|
||||
bus->sub_reg = PCIR_SUBBUS_2;
|
||||
break;
|
||||
default:
|
||||
panic("not a PCI bridge");
|
||||
}
|
||||
bus->dev = dev;
|
||||
bus->rman.rm_start = 0;
|
||||
bus->rman.rm_end = PCI_BUSMAX;
|
||||
bus->rman.rm_type = RMAN_ARRAY;
|
||||
snprintf(buf, sizeof(buf), "%s bus numbers", device_get_nameunit(dev));
|
||||
bus->rman.rm_descr = strdup(buf, M_DEVBUF);
|
||||
error = rman_init(&bus->rman);
|
||||
if (error)
|
||||
panic("Failed to initialize %s bus number rman",
|
||||
device_get_nameunit(dev));
|
||||
|
||||
/*
|
||||
* Allocate a bus range. This will return an existing bus range
|
||||
* if one exists, or a new bus range if one does not.
|
||||
*/
|
||||
rid = 0;
|
||||
bus->res = bus_alloc_resource(dev, PCI_RES_BUS, &rid, 0ul, ~0ul,
|
||||
min_count, 0);
|
||||
if (bus->res == NULL) {
|
||||
/*
|
||||
* Fall back to just allocating a range of a single bus
|
||||
* number.
|
||||
*/
|
||||
bus->res = bus_alloc_resource(dev, PCI_RES_BUS, &rid, 0ul, ~0ul,
|
||||
1, 0);
|
||||
} else if (rman_get_size(bus->res) < min_count)
|
||||
/*
|
||||
* Attempt to grow the existing range to satisfy the
|
||||
* minimum desired count.
|
||||
*/
|
||||
(void)bus_adjust_resource(dev, PCI_RES_BUS, bus->res,
|
||||
rman_get_start(bus->res), rman_get_start(bus->res) +
|
||||
min_count - 1);
|
||||
|
||||
/*
|
||||
* Add the initial resource to the rman.
|
||||
*/
|
||||
if (bus->res != NULL) {
|
||||
error = rman_manage_region(&bus->rman, rman_get_start(bus->res),
|
||||
rman_get_end(bus->res));
|
||||
if (error)
|
||||
panic("Failed to add resource to rman");
|
||||
bus->sec = rman_get_start(bus->res);
|
||||
bus->sub = rman_get_end(bus->res);
|
||||
}
|
||||
}
|
||||
|
||||
static struct resource *
|
||||
pcib_suballoc_bus(struct pcib_secbus *bus, device_t child, int *rid,
|
||||
u_long start, u_long end, u_long count, u_int flags)
|
||||
{
|
||||
struct resource *res;
|
||||
|
||||
res = rman_reserve_resource(&bus->rman, start, end, count, flags,
|
||||
child);
|
||||
if (res == NULL)
|
||||
return (NULL);
|
||||
|
||||
if (bootverbose)
|
||||
device_printf(bus->dev,
|
||||
"allocated bus range (%lu-%lu) for rid %d of %s\n",
|
||||
rman_get_start(res), rman_get_end(res), *rid,
|
||||
pcib_child_name(child));
|
||||
rman_set_rid(res, *rid);
|
||||
return (res);
|
||||
}
|
||||
|
||||
/*
|
||||
* Attempt to grow the secondary bus range. This is much simpler than
|
||||
* for I/O windows as the range can only be grown by increasing
|
||||
* subbus.
|
||||
*/
|
||||
static int
|
||||
pcib_grow_subbus(struct pcib_secbus *bus, u_long new_end)
|
||||
{
|
||||
u_long old_end;
|
||||
int error;
|
||||
|
||||
old_end = rman_get_end(bus->res);
|
||||
KASSERT(new_end > old_end, ("attempt to shrink subbus"));
|
||||
error = bus_adjust_resource(bus->dev, PCI_RES_BUS, bus->res,
|
||||
rman_get_start(bus->res), new_end);
|
||||
if (error)
|
||||
return (error);
|
||||
if (bootverbose)
|
||||
device_printf(bus->dev, "grew bus range to %lu-%lu\n",
|
||||
rman_get_start(bus->res), rman_get_end(bus->res));
|
||||
error = rman_manage_region(&bus->rman, old_end + 1,
|
||||
rman_get_end(bus->res));
|
||||
if (error)
|
||||
panic("Failed to add resource to rman");
|
||||
bus->sub = rman_get_end(bus->res);
|
||||
pci_write_config(bus->dev, bus->sub_reg, bus->sub, 1);
|
||||
return (0);
|
||||
}
|
||||
|
||||
struct resource *
|
||||
pcib_alloc_subbus(struct pcib_secbus *bus, device_t child, int *rid,
|
||||
u_long start, u_long end, u_long count, u_int flags)
|
||||
{
|
||||
struct resource *res;
|
||||
u_long start_free, end_free, new_end;
|
||||
|
||||
/*
|
||||
* First, see if the request can be satisified by the existing
|
||||
* bus range.
|
||||
*/
|
||||
res = pcib_suballoc_bus(bus, child, rid, start, end, count, flags);
|
||||
if (res != NULL)
|
||||
return (res);
|
||||
|
||||
/*
|
||||
* Figure out a range to grow the bus range. First, find the
|
||||
* first bus number after the last allocated bus in the rman and
|
||||
* enforce that as a minimum starting point for the range.
|
||||
*/
|
||||
if (rman_last_free_region(&bus->rman, &start_free, &end_free) != 0 ||
|
||||
end_free != bus->sub)
|
||||
start_free = bus->sub + 1;
|
||||
if (start_free < start)
|
||||
start_free = start;
|
||||
new_end = start_free + count - 1;
|
||||
|
||||
/*
|
||||
* See if this new range would satisfy the request if it
|
||||
* succeeds.
|
||||
*/
|
||||
if (new_end > end)
|
||||
return (NULL);
|
||||
|
||||
/* Finally, attempt to grow the existing resource. */
|
||||
if (bootverbose) {
|
||||
device_printf(bus->dev,
|
||||
"attempting to grow bus range for %lu buses\n", count);
|
||||
printf("\tback candidate range: %lu-%lu\n", start_free,
|
||||
new_end);
|
||||
}
|
||||
if (pcib_grow_subbus(bus, new_end) == 0)
|
||||
return (pcib_suballoc_bus(bus, child, rid, start, end, count,
|
||||
flags));
|
||||
return (NULL);
|
||||
}
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
/*
|
||||
@ -669,8 +840,8 @@ pcib_cfg_save(struct pcib_softc *sc)
|
||||
|
||||
sc->command = pci_read_config(dev, PCIR_COMMAND, 2);
|
||||
sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1);
|
||||
sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1);
|
||||
sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
|
||||
sc->bus.sec = pci_read_config(dev, PCIR_SECBUS_1, 1);
|
||||
sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
|
||||
sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
|
||||
sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1);
|
||||
#ifndef NEW_PCIB
|
||||
@ -693,8 +864,8 @@ pcib_cfg_restore(struct pcib_softc *sc)
|
||||
|
||||
pci_write_config(dev, PCIR_COMMAND, sc->command, 2);
|
||||
pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
|
||||
pci_write_config(dev, PCIR_SECBUS_1, sc->secbus, 1);
|
||||
pci_write_config(dev, PCIR_SUBBUS_1, sc->subbus, 1);
|
||||
pci_write_config(dev, PCIR_SECBUS_1, sc->bus.sec, 1);
|
||||
pci_write_config(dev, PCIR_SUBBUS_1, sc->bus.sub, 1);
|
||||
pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2);
|
||||
pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1);
|
||||
#ifdef NEW_PCIB
|
||||
@ -739,6 +910,13 @@ pcib_attach_common(device_t dev)
|
||||
sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2);
|
||||
pcib_cfg_save(sc);
|
||||
|
||||
/*
|
||||
* The primary bus register should always be the bus of the
|
||||
* parent.
|
||||
*/
|
||||
sc->pribus = pci_get_bus(dev);
|
||||
pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
|
||||
|
||||
/*
|
||||
* Setup sysctl reporting nodes
|
||||
*/
|
||||
@ -749,25 +927,27 @@ pcib_attach_common(device_t dev)
|
||||
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
|
||||
CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
|
||||
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
|
||||
CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number");
|
||||
CTLFLAG_RD, &sc->bus.sec, 0, "Secondary bus number");
|
||||
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
|
||||
CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number");
|
||||
CTLFLAG_RD, &sc->bus.sub, 0, "Subordinate bus number");
|
||||
|
||||
/*
|
||||
* Quirk handling.
|
||||
*/
|
||||
switch (pci_get_devid(dev)) {
|
||||
#if !defined(NEW_PCIB) && !defined(PCI_RES_BUS)
|
||||
case 0x12258086: /* Intel 82454KX/GX (Orion) */
|
||||
{
|
||||
uint8_t supbus;
|
||||
|
||||
supbus = pci_read_config(dev, 0x41, 1);
|
||||
if (supbus != 0xff) {
|
||||
sc->secbus = supbus + 1;
|
||||
sc->subbus = supbus + 1;
|
||||
sc->bus.sec = supbus + 1;
|
||||
sc->bus.sub = supbus + 1;
|
||||
}
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The i82380FB mobile docking controller is a PCI-PCI bridge,
|
||||
@ -781,6 +961,7 @@ pcib_attach_common(device_t dev)
|
||||
sc->flags |= PCIB_SUBTRACTIVE;
|
||||
break;
|
||||
|
||||
#if !defined(NEW_PCIB) && !defined(PCI_RES_BUS)
|
||||
/* Compaq R3000 BIOS sets wrong subordinate bus number. */
|
||||
case 0x00dd10de:
|
||||
{
|
||||
@ -800,12 +981,13 @@ pcib_attach_common(device_t dev)
|
||||
break;
|
||||
}
|
||||
freeenv(cp);
|
||||
if (sc->subbus < 0xa) {
|
||||
if (sc->bus.sub < 0xa) {
|
||||
pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
|
||||
sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
|
||||
sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
|
||||
}
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
if (pci_msi_device_blacklisted(dev))
|
||||
@ -827,12 +1009,15 @@ pcib_attach_common(device_t dev)
|
||||
sc->flags |= PCIB_SUBTRACTIVE;
|
||||
|
||||
#ifdef NEW_PCIB
|
||||
#ifdef PCI_RES_BUS
|
||||
pcib_setup_secbus(dev, &sc->bus, 1);
|
||||
#endif
|
||||
pcib_probe_windows(sc);
|
||||
#endif
|
||||
if (bootverbose) {
|
||||
device_printf(dev, " domain %d\n", sc->domain);
|
||||
device_printf(dev, " secondary bus %d\n", sc->secbus);
|
||||
device_printf(dev, " subordinate bus %d\n", sc->subbus);
|
||||
device_printf(dev, " secondary bus %d\n", sc->bus.sec);
|
||||
device_printf(dev, " subordinate bus %d\n", sc->bus.sub);
|
||||
#ifdef NEW_PCIB
|
||||
if (pcib_is_window_open(&sc->io))
|
||||
device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
|
||||
@ -872,20 +1057,6 @@ pcib_attach_common(device_t dev)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX If the secondary bus number is zero, we should assign a bus number
|
||||
* since the BIOS hasn't, then initialise the bridge. A simple
|
||||
* bus_alloc_resource with the a couple of busses seems like the right
|
||||
* approach, but we don't know what busses the BIOS might have already
|
||||
* assigned to other bridges on this bus that probe later than we do.
|
||||
*
|
||||
* If the subordinate bus number is less than the secondary bus number,
|
||||
* we should pick a better value. One sensible alternative would be to
|
||||
* pick 255; the only tradeoff here is that configuration transactions
|
||||
* would be more widely routed than absolutely necessary. We could
|
||||
* then do a walk of the tree later and fix it.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Always enable busmastering on bridges so that transactions
|
||||
* initiated on the secondary bus are passed through to the
|
||||
@ -902,8 +1073,8 @@ pcib_attach(device_t dev)
|
||||
|
||||
pcib_attach_common(dev);
|
||||
sc = device_get_softc(dev);
|
||||
if (sc->secbus != 0) {
|
||||
child = device_add_child(dev, "pci", sc->secbus);
|
||||
if (sc->bus.sec != 0) {
|
||||
child = device_add_child(dev, "pci", sc->bus.sec);
|
||||
if (child != NULL)
|
||||
return(bus_generic_attach(dev));
|
||||
}
|
||||
@ -953,7 +1124,7 @@ pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
||||
*result = sc->domain;
|
||||
return(0);
|
||||
case PCIB_IVAR_BUS:
|
||||
*result = sc->secbus;
|
||||
*result = sc->bus.sec;
|
||||
return(0);
|
||||
}
|
||||
return(ENOENT);
|
||||
@ -962,14 +1133,12 @@ pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
||||
int
|
||||
pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
|
||||
{
|
||||
struct pcib_softc *sc = device_get_softc(dev);
|
||||
|
||||
switch (which) {
|
||||
case PCIB_IVAR_DOMAIN:
|
||||
return(EINVAL);
|
||||
case PCIB_IVAR_BUS:
|
||||
sc->secbus = value;
|
||||
return(0);
|
||||
return(EINVAL);
|
||||
}
|
||||
return(ENOENT);
|
||||
}
|
||||
@ -1379,6 +1548,11 @@ pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
||||
}
|
||||
|
||||
switch (type) {
|
||||
#ifdef PCI_RES_BUS
|
||||
case PCI_RES_BUS:
|
||||
return (pcib_alloc_subbus(&sc->bus, child, rid, start, end,
|
||||
count, flags));
|
||||
#endif
|
||||
case SYS_RES_IOPORT:
|
||||
if (pcib_is_isa_range(sc, start, end, count))
|
||||
return (NULL);
|
||||
|
||||
@ -40,6 +40,9 @@ DECLARE_CLASS(pci_driver);
|
||||
|
||||
struct pci_softc {
|
||||
bus_dma_tag_t sc_dma_tag;
|
||||
#ifdef PCI_RES_BUS
|
||||
struct resource *sc_bus;
|
||||
#endif
|
||||
};
|
||||
|
||||
extern int pci_do_power_resume;
|
||||
|
||||
@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/rman.h>
|
||||
#include <sys/systm.h>
|
||||
|
||||
@ -282,4 +283,102 @@ pcib_host_res_adjust(struct pcib_host_resources *hr, device_t dev, int type,
|
||||
}
|
||||
return (ERANGE);
|
||||
}
|
||||
|
||||
#ifdef PCI_RES_BUS
|
||||
struct pci_domain {
|
||||
int pd_domain;
|
||||
struct rman pd_bus_rman;
|
||||
TAILQ_ENTRY(pci_domain) pd_link;
|
||||
};
|
||||
|
||||
static TAILQ_HEAD(, pci_domain) domains = TAILQ_HEAD_INITIALIZER(domains);
|
||||
|
||||
/*
|
||||
* Each PCI domain maintains its own resource manager for PCI bus
|
||||
* numbers in that domain. Domain objects are created on first use.
|
||||
* Host to PCI bridge drivers and PCI-PCI bridge drivers should
|
||||
* allocate their bus ranges from their domain.
|
||||
*/
|
||||
static struct pci_domain *
|
||||
pci_find_domain(int domain)
|
||||
{
|
||||
struct pci_domain *d;
|
||||
char buf[64];
|
||||
int error;
|
||||
|
||||
TAILQ_FOREACH(d, &domains, pd_link) {
|
||||
if (d->pd_domain == domain)
|
||||
return (d);
|
||||
}
|
||||
|
||||
snprintf(buf, sizeof(buf), "PCI domain %d bus numbers", domain);
|
||||
d = malloc(sizeof(*d) + strlen(buf) + 1, M_DEVBUF, M_WAITOK | M_ZERO);
|
||||
d->pd_domain = domain;
|
||||
d->pd_bus_rman.rm_start = 0;
|
||||
d->pd_bus_rman.rm_end = PCI_BUSMAX;
|
||||
d->pd_bus_rman.rm_type = RMAN_ARRAY;
|
||||
strcpy((char *)(d + 1), buf);
|
||||
d->pd_bus_rman.rm_descr = (char *)(d + 1);
|
||||
error = rman_init(&d->pd_bus_rman);
|
||||
if (error == 0)
|
||||
error = rman_manage_region(&d->pd_bus_rman, 0, PCI_BUSMAX);
|
||||
if (error)
|
||||
panic("Failed to initialize PCI domain %d rman", domain);
|
||||
TAILQ_INSERT_TAIL(&domains, d, pd_link);
|
||||
return (d);
|
||||
}
|
||||
|
||||
struct resource *
|
||||
pci_domain_alloc_bus(int domain, device_t dev, int *rid, u_long start,
|
||||
u_long end, u_long count, u_int flags)
|
||||
{
|
||||
struct pci_domain *d;
|
||||
struct resource *res;
|
||||
|
||||
if (domain < 0 || domain > PCI_DOMAINMAX)
|
||||
return (NULL);
|
||||
d = pci_find_domain(domain);
|
||||
res = rman_reserve_resource(&d->pd_bus_rman, start, end, count, flags,
|
||||
dev);
|
||||
if (res == NULL)
|
||||
return (NULL);
|
||||
|
||||
rman_set_rid(res, *rid);
|
||||
return (res);
|
||||
}
|
||||
|
||||
int
|
||||
pci_domain_adjust_bus(int domain, device_t dev, struct resource *r,
|
||||
u_long start, u_long end)
|
||||
{
|
||||
#ifdef INVARIANTS
|
||||
struct pci_domain *d;
|
||||
#endif
|
||||
|
||||
if (domain < 0 || domain > PCI_DOMAINMAX)
|
||||
return (EINVAL);
|
||||
#ifdef INVARIANTS
|
||||
d = pci_find_domain(domain);
|
||||
KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource"));
|
||||
#endif
|
||||
return (rman_adjust_resource(r, start, end));
|
||||
}
|
||||
|
||||
int
|
||||
pci_domain_release_bus(int domain, device_t dev, int rid, struct resource *r)
|
||||
{
|
||||
#ifdef INVARIANTS
|
||||
struct pci_domain *d;
|
||||
#endif
|
||||
|
||||
if (domain < 0 || domain > PCI_DOMAINMAX)
|
||||
return (EINVAL);
|
||||
#ifdef INVARIANTS
|
||||
d = pci_find_domain(domain);
|
||||
KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource"));
|
||||
#endif
|
||||
return (rman_release_resource(r));
|
||||
}
|
||||
#endif /* PCI_RES_BUS */
|
||||
|
||||
#endif /* NEW_PCIB */
|
||||
|
||||
@ -83,6 +83,18 @@ struct pcib_window {
|
||||
};
|
||||
#endif
|
||||
|
||||
struct pcib_secbus {
|
||||
u_int sec;
|
||||
u_int sub;
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
device_t dev;
|
||||
struct rman rman;
|
||||
struct resource *res;
|
||||
const char *name;
|
||||
int sub_reg;
|
||||
#endif
|
||||
};
|
||||
|
||||
/*
|
||||
* Bridge-specific data.
|
||||
*/
|
||||
@ -96,8 +108,7 @@ struct pcib_softc
|
||||
uint16_t command; /* command register */
|
||||
u_int domain; /* domain number */
|
||||
u_int pribus; /* primary bus number */
|
||||
u_int secbus; /* secondary bus number */
|
||||
u_int subbus; /* subordinate bus number */
|
||||
struct pcib_secbus bus; /* secondary bus numbers */
|
||||
#ifdef NEW_PCIB
|
||||
struct pcib_window io; /* I/O port window */
|
||||
struct pcib_window mem; /* memory window */
|
||||
@ -117,13 +128,26 @@ struct pcib_softc
|
||||
|
||||
typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);
|
||||
|
||||
int host_pcib_get_busno(pci_read_config_fn read_config, int bus,
|
||||
int slot, int func, uint8_t *busnum);
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
struct resource *pci_domain_alloc_bus(int domain, device_t dev, int *rid,
|
||||
u_long start, u_long end, u_long count, u_int flags);
|
||||
int pci_domain_adjust_bus(int domain, device_t dev,
|
||||
struct resource *r, u_long start, u_long end);
|
||||
int pci_domain_release_bus(int domain, device_t dev, int rid,
|
||||
struct resource *r);
|
||||
struct resource *pcib_alloc_subbus(struct pcib_secbus *bus, device_t child,
|
||||
int *rid, u_long start, u_long end, u_long count,
|
||||
u_int flags);
|
||||
void pcib_setup_secbus(device_t dev, struct pcib_secbus *bus,
|
||||
int min_count);
|
||||
#endif
|
||||
int pcib_attach(device_t dev);
|
||||
void pcib_attach_common(device_t dev);
|
||||
#ifdef NEW_PCIB
|
||||
const char *pcib_child_name(device_t child);
|
||||
#endif
|
||||
int host_pcib_get_busno(pci_read_config_fn read_config, int bus,
|
||||
int slot, int func, uint8_t *busnum);
|
||||
int pcib_attach(device_t dev);
|
||||
void pcib_attach_common(device_t dev);
|
||||
int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
|
||||
int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
|
||||
struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
||||
|
||||
@ -40,5 +40,8 @@
|
||||
#define SYS_RES_DRQ 2 /* isa dma lines */
|
||||
#define SYS_RES_MEMORY 3 /* i/o memory */
|
||||
#define SYS_RES_IOPORT 4 /* i/o ports */
|
||||
#ifdef NEW_PCIB
|
||||
#define PCI_RES_BUS 5 /* PCI bus numbers */
|
||||
#endif
|
||||
|
||||
#endif /* !_MACHINE_RESOURCE_H_ */
|
||||
|
||||
@ -177,9 +177,9 @@ apb_attach(device_t dev)
|
||||
pci_read_config(dev, PCIR_COMMAND, 2);
|
||||
sc->sc_bsc.ops_pcib_sc.pribus =
|
||||
pci_read_config(dev, PCIR_PRIBUS_1, 1);
|
||||
sc->sc_bsc.ops_pcib_sc.secbus =
|
||||
sc->sc_bsc.ops_pcib_sc.bus.sec =
|
||||
pci_read_config(dev, PCIR_SECBUS_1, 1);
|
||||
sc->sc_bsc.ops_pcib_sc.subbus =
|
||||
sc->sc_bsc.ops_pcib_sc.bus.sub =
|
||||
pci_read_config(dev, PCIR_SUBBUS_1, 1);
|
||||
sc->sc_bsc.ops_pcib_sc.bridgectl =
|
||||
pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
|
||||
@ -200,10 +200,10 @@ apb_attach(device_t dev)
|
||||
CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.pribus, 0,
|
||||
"Primary bus number");
|
||||
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
|
||||
CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.secbus, 0,
|
||||
CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.bus.sec, 0,
|
||||
"Secondary bus number");
|
||||
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
|
||||
CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.subbus, 0,
|
||||
CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.bus.sub, 0,
|
||||
"Subordinate bus number");
|
||||
|
||||
ofw_pcib_gen_setup(dev);
|
||||
@ -212,9 +212,9 @@ apb_attach(device_t dev)
|
||||
device_printf(dev, " domain %d\n",
|
||||
sc->sc_bsc.ops_pcib_sc.domain);
|
||||
device_printf(dev, " secondary bus %d\n",
|
||||
sc->sc_bsc.ops_pcib_sc.secbus);
|
||||
sc->sc_bsc.ops_pcib_sc.bus.sec);
|
||||
device_printf(dev, " subordinate bus %d\n",
|
||||
sc->sc_bsc.ops_pcib_sc.subbus);
|
||||
sc->sc_bsc.ops_pcib_sc.bus.sub);
|
||||
device_printf(dev, " I/O decode ");
|
||||
apb_map_print(sc->sc_iomap, APB_IO_SCALE);
|
||||
printf("\n");
|
||||
|
||||
@ -57,6 +57,10 @@ int legacy_pcib_write_ivar(device_t dev, device_t child, int which,
|
||||
uintptr_t value);
|
||||
struct resource *legacy_pcib_alloc_resource(device_t dev, device_t child,
|
||||
int type, int *rid, u_long start, u_long end, u_long count, u_int flags);
|
||||
int legacy_pcib_adjust_resource(device_t dev, device_t child, int type,
|
||||
struct resource *r, u_long start, u_long end);
|
||||
int legacy_pcib_release_resource(device_t dev, device_t child, int type,
|
||||
int rid, struct resource *r);
|
||||
int legacy_pcib_alloc_msi(device_t pcib, device_t dev, int count,
|
||||
int maxcount, int *irqs);
|
||||
int legacy_pcib_alloc_msix(device_t pcib, device_t dev, int *irq);
|
||||
|
||||
@ -597,11 +597,38 @@ legacy_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
||||
u_long start, u_long end, u_long count, u_int flags)
|
||||
{
|
||||
|
||||
start = hostb_alloc_start(type, start, end, count);
|
||||
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
||||
count, flags));
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
if (type == PCI_RES_BUS)
|
||||
return (pci_domain_alloc_bus(0, child, rid, start, end, count,
|
||||
flags));
|
||||
#endif
|
||||
start = hostb_alloc_start(type, start, end, count);
|
||||
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
||||
count, flags));
|
||||
}
|
||||
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
int
|
||||
legacy_pcib_adjust_resource(device_t dev, device_t child, int type,
|
||||
struct resource *r, u_long start, u_long end)
|
||||
{
|
||||
|
||||
if (type == PCI_RES_BUS)
|
||||
return (pci_domain_adjust_bus(0, child, r, start, end));
|
||||
return (bus_generic_adjust_resource(dev, child, type, r, start, end));
|
||||
}
|
||||
|
||||
int
|
||||
legacy_pcib_release_resource(device_t dev, device_t child, int type, int rid,
|
||||
struct resource *r)
|
||||
{
|
||||
|
||||
if (type == PCI_RES_BUS)
|
||||
return (pci_domain_release_bus(0, child, rid, r));
|
||||
return (bus_generic_release_resource(dev, child, type, rid, r));
|
||||
}
|
||||
#endif
|
||||
|
||||
static device_method_t legacy_pcib_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_identify, legacy_pcib_identify),
|
||||
@ -615,8 +642,13 @@ static device_method_t legacy_pcib_methods[] = {
|
||||
DEVMETHOD(bus_read_ivar, legacy_pcib_read_ivar),
|
||||
DEVMETHOD(bus_write_ivar, legacy_pcib_write_ivar),
|
||||
DEVMETHOD(bus_alloc_resource, legacy_pcib_alloc_resource),
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
DEVMETHOD(bus_adjust_resource, legacy_pcib_adjust_resource),
|
||||
DEVMETHOD(bus_release_resource, legacy_pcib_release_resource),
|
||||
#else
|
||||
DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
|
||||
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
||||
#endif
|
||||
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
||||
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
||||
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
||||
|
||||
@ -238,6 +238,20 @@ qpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
static struct resource *
|
||||
qpi_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
||||
u_long start, u_long end, u_long count, u_int flags)
|
||||
{
|
||||
|
||||
if (type == PCI_RES_BUS)
|
||||
return (pci_domain_alloc_bus(0, child, rid, start, end, count,
|
||||
flags));
|
||||
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
||||
count, flags));
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
qpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
|
||||
uint32_t *data)
|
||||
@ -258,8 +272,14 @@ static device_method_t qpi_pcib_methods[] = {
|
||||
|
||||
/* Bus interface */
|
||||
DEVMETHOD(bus_read_ivar, qpi_pcib_read_ivar),
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
DEVMETHOD(bus_alloc_resource, qpi_pcib_alloc_resource),
|
||||
DEVMETHOD(bus_adjust_resource, legacy_pcib_adjust_resource),
|
||||
DEVMETHOD(bus_release_resource, legacy_pcib_release_resource),
|
||||
#else
|
||||
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
|
||||
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
||||
#endif
|
||||
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
||||
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
||||
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
||||
|
||||
@ -105,6 +105,11 @@ mptable_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
||||
{
|
||||
struct mptable_hostb_softc *sc;
|
||||
|
||||
#ifdef PCI_RES_BUS
|
||||
if (type == PCI_RES_BUS)
|
||||
return (pci_domain_alloc_bus(0, child, rid, start, end, count,
|
||||
flags));
|
||||
#endif
|
||||
sc = device_get_softc(dev);
|
||||
if (type == SYS_RES_IOPORT && start + count - 1 == end) {
|
||||
if (mptable_is_isa_range(start, end)) {
|
||||
@ -141,6 +146,10 @@ mptable_hostb_adjust_resource(device_t dev, device_t child, int type,
|
||||
{
|
||||
struct mptable_hostb_softc *sc;
|
||||
|
||||
#ifdef PCI_RES_BUS
|
||||
if (type == PCI_RES_BUS)
|
||||
return (pci_domain_adjust_bus(0, child, r, start, end));
|
||||
#endif
|
||||
sc = device_get_softc(dev);
|
||||
return (pcib_host_res_adjust(&sc->sc_host_res, child, type, r, start,
|
||||
end));
|
||||
@ -165,7 +174,11 @@ static device_method_t mptable_hostb_methods[] = {
|
||||
DEVMETHOD(bus_alloc_resource, legacy_pcib_alloc_resource),
|
||||
DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
|
||||
#endif
|
||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
||||
DEVMETHOD(bus_release_resource, legacy_pcib_release_resource),
|
||||
#else
|
||||
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
||||
#endif
|
||||
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
||||
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
||||
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user