Update HEAD with FSF branch 3.2.1 release files.
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parent
21da7e2bd7
commit
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=107605
@ -1383,7 +1383,8 @@ varasm.o : varasm.c $(CONFIG_H) $(SYSTEM_H) $(TREE_H) $(RTL_H) flags.h \
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$(HASHTAB_H) $(TARGET_H) langhooks.h
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function.o : function.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) $(TREE_H) flags.h \
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function.h $(EXPR_H) libfuncs.h $(REGS_H) hard-reg-set.h \
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insn-config.h $(RECOG_H) output.h toplev.h except.h hash.h $(GGC_H) $(TM_P_H)
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insn-config.h $(RECOG_H) output.h toplev.h except.h hash.h $(GGC_H) \
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$(TM_P_H) langhooks.h
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stmt.o : stmt.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) $(TREE_H) flags.h function.h \
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insn-config.h hard-reg-set.h $(EXPR_H) libfuncs.h except.h \
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$(LOOP_H) $(RECOG_H) toplev.h output.h varray.h $(GGC_H) $(TM_P_H)
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@ -5311,7 +5311,7 @@
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(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
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(match_operand:DI 2 "general_operand" "roiF,riF")))
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(clobber (reg:CC 17))]
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"!TARGET_64BIT"
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"!TARGET_64BIT && ix86_binary_operator_ok (PLUS, DImode, operands)"
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"#")
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(define_split
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@ -6940,7 +6940,7 @@
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(minus:DI (match_operand:DI 1 "nonimmediate_operand" "0,0")
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(match_operand:DI 2 "general_operand" "roiF,riF")))
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(clobber (reg:CC 17))]
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"!TARGET_64BIT"
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"!TARGET_64BIT && ix86_binary_operator_ok (MINUS, DImode, operands)"
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"#")
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(define_split
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@ -59,6 +59,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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#include "ggc.h"
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#include "tm_p.h"
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#include "integrate.h"
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#include "langhooks.h"
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#ifndef TRAMPOLINE_ALIGNMENT
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#define TRAMPOLINE_ALIGNMENT FUNCTION_BOUNDARY
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@ -826,7 +827,8 @@ assign_stack_temp_for_type (mode, size, keep, type)
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/* If a type is specified, set the relevant flags. */
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if (type != 0)
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{
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RTX_UNCHANGING_P (slot) = TYPE_READONLY (type);
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RTX_UNCHANGING_P (slot) = (lang_hooks.honor_readonly
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&& TYPE_READONLY (type));
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MEM_VOLATILE_P (slot) = TYPE_VOLATILE (type);
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MEM_SET_IN_STRUCT_P (slot, AGGREGATE_TYPE_P (type));
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}
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@ -242,7 +242,7 @@ static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
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#endif
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static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
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unsigned int));
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static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
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static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
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static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
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static void combine_reloads PARAMS ((void));
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static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
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@ -794,9 +794,10 @@ find_reusable_reload (p_in, out, class, type, opnum, dont_share)
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SUBREG_REG expression. */
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static int
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reload_inner_reg_of_subreg (x, mode)
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reload_inner_reg_of_subreg (x, mode, output)
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rtx x;
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enum machine_mode mode;
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int output;
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{
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rtx inner;
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@ -824,6 +825,7 @@ reload_inner_reg_of_subreg (x, mode)
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word and the number of regs for INNER is not the same as the
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number of words in INNER, then INNER will need reloading. */
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return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
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&& output
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&& GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
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&& ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
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!= HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
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@ -1047,7 +1049,7 @@ push_reload (in, out, inloc, outloc, class,
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/* Similar issue for (SUBREG constant ...) if it was not handled by the
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code above. This can happen if SUBREG_BYTE != 0. */
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if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
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if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
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{
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enum reg_class in_class = class;
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@ -1144,7 +1146,7 @@ push_reload (in, out, inloc, outloc, class,
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However, we must reload the inner reg *as well as* the subreg in
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that case. In this case, the inner reg is an in-out reload. */
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if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
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if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
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{
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/* This relies on the fact that emit_reload_insns outputs the
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instructions for output reloads of type RELOAD_OTHER in reverse
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@ -1722,7 +1724,8 @@ combine_reloads ()
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&& ! (GET_CODE (rld[i].in) == REG
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&& reg_overlap_mentioned_for_reload_p (rld[i].in,
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rld[output_reload].out))))
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&& ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
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&& ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
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rld[i].when_needed != RELOAD_FOR_INPUT)
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&& (reg_class_size[(int) rld[i].class]
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|| SMALL_REGISTER_CLASSES)
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/* We will allow making things slightly worse by combining an
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@ -4424,20 +4427,12 @@ find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
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reg_equiv_constant[regno])) != 0)
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return tem;
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if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
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&& regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
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&& reg_equiv_constant[regno] != 0
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&& (tem = operand_subword (reg_equiv_constant[regno],
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SUBREG_BYTE (x) / UNITS_PER_WORD, 0,
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GET_MODE (SUBREG_REG (x)))) != 0)
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if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
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&& reg_equiv_constant[regno] != 0)
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{
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/* TEM is now a word sized constant for the bits from X that
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we wanted. However, TEM may be the wrong representation.
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Use gen_lowpart_common to convert a CONST_INT into a
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CONST_DOUBLE and vice versa as needed according to by the mode
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of the SUBREG. */
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tem = gen_lowpart_common (GET_MODE (x), tem);
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tem =
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simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
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GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
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if (!tem)
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abort ();
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return tem;
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