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The physical address space of cheetah-class CPUs has been extended

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to 43 bits so update TD_PA_BITS accordingly. For the most part this
increase is transparent to the existing code except for when reading
the physical address from ASI_{D,I}TLB_DATA_ACCESS_REG, which we
only do in the loader and which was already adjusted in r182478, or
from the OFW translations node.
While at it, ensure we are only taking valid OFW mapping entries
into account.
This commit is contained in:
Marius Strobl 2008-09-04 19:43:14 +00:00
parent 5aa6f9f392
commit 4f76d0a885
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=182767
2 changed files with 17 additions and 5 deletions
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11
sys/sparc64/include/tte.h
View File

@ -36,21 +36,24 @@
#define TD_SIZE_SHIFT (61)
#define TD_SOFT2_SHIFT (50)
#define TD_DIAG_SHIFT (41)
#define TD_DIAG_SF_SHIFT (41)
#define TD_RSVD_CH_SHIFT (43)
#define TD_PA_SHIFT (13)
#define TD_SOFT_SHIFT (7)
#define TD_SIZE_BITS (2)
#define TD_SOFT2_BITS (9)
#define TD_DIAG_BITS (9)
#define TD_DIAG_SF_BITS (9)
#define TD_RSVD_CH_BITS (7)
#define TD_PA_CH_BITS (30)
#define TD_PA_SF_BITS (28)
#define TD_PA_BITS TD_PA_SF_BITS
#define TD_PA_BITS TD_PA_CH_BITS
#define TD_SOFT_BITS (6)
#define TD_SIZE_MASK ((1UL << TD_SIZE_BITS) - 1)
#define TD_SOFT2_MASK ((1UL << TD_SOFT2_BITS) - 1)
#define TD_DIAG_MASK ((1UL << TD_DIAG_BITS) - 1)
#define TD_DIAG_SF_MASK ((1UL << TD_DIAG_SF_BITS) - 1)
#define TD_RSVD_CH_MASK ((1UL << TD_RSVD_CH_BITS) - 1)
#define TD_PA_CH_MASK ((1UL << TD_PA_CH_BITS) - 1)
#define TD_PA_SF_MASK ((1UL << TD_PA_SF_BITS) - 1)
#define TD_PA_MASK ((1UL << TD_PA_BITS) - 1)

11
sys/sparc64/sparc64/pmap.c
View File

@ -103,6 +103,7 @@ __FBSDID("$FreeBSD$");
#include <machine/tlb.h>
#include <machine/tte.h>
#include <machine/tsb.h>
#include <machine/ver.h>
#define PMAP_DEBUG
@ -473,6 +474,8 @@ pmap_bootstrap(vm_offset_t ekva)
"translation: start=%#lx size=%#lx tte=%#lx",
translations[i].om_start, translations[i].om_size,
translations[i].om_tte);
if ((translations[i].om_tte & TD_V) == 0)
continue;
if (translations[i].om_start < VM_MIN_PROM_ADDRESS ||
translations[i].om_start > VM_MAX_PROM_ADDRESS)
continue;
@ -483,7 +486,11 @@ pmap_bootstrap(vm_offset_t ekva)
tp->tte_vpn = TV_VPN(va, TS_8K);
tp->tte_data =
((translations[i].om_tte &
~(TD_SOFT_MASK << TD_SOFT_SHIFT)) | TD_EXEC) +
~((TD_SOFT2_MASK << TD_SOFT2_SHIFT) |
(cpu_impl < CPU_IMPL_ULTRASPARCIII ?
(TD_DIAG_SF_MASK << TD_DIAG_SF_SHIFT) :
(TD_RSVD_CH_MASK << TD_RSVD_CH_SHIFT)) |
(TD_SOFT_MASK << TD_SOFT_SHIFT))) | TD_EXEC) +
off;
}
}
@ -603,6 +610,8 @@ pmap_init(void)
for (i = 0; i < translations_size; i++) {
addr = translations[i].om_start;
size = translations[i].om_size;
if ((translations[i].om_tte & TD_V) == 0)
continue;
if (addr < VM_MIN_PROM_ADDRESS || addr > VM_MAX_PROM_ADDRESS)
continue;
result = vm_map_find(kernel_map, NULL, 0, &addr, size, FALSE,