diff --git a/share/man/man4/fwohci.4 b/share/man/man4/fwohci.4 index aa9aff3055f2..3d9f763baef5 100644 --- a/share/man/man4/fwohci.4 +++ b/share/man/man4/fwohci.4 @@ -100,8 +100,6 @@ Sony CX3022 .It Sony i.LINK (CXD3222) .It -Sun PCIO-2 (RIO 1394) -.It Texas Instruments PCI4410A .It Texas Instruments PCI4450 diff --git a/sys/dev/firewire/fwohci_pci.c b/sys/dev/firewire/fwohci_pci.c index aa024df42ac6..595a9d402983 100644 --- a/sys/dev/firewire/fwohci_pci.c +++ b/sys/dev/firewire/fwohci_pci.c @@ -187,10 +187,6 @@ fwohci_pci_probe(device_t dev) device_set_desc(dev, "Adaptec AHA-894x/AIC-5800"); return BUS_PROBE_DEFAULT; } - if (id == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW)) { - device_set_desc(dev, "Sun PCIO-2"); - return BUS_PROBE_DEFAULT; - } if (pci_get_class(dev) == PCIC_SERIALBUS && pci_get_subclass(dev) == PCIS_SERIALBUS_FW && pci_get_progif(dev) == PCI_INTERFACE_OHCI) { @@ -217,14 +213,6 @@ fwohci_pci_init(device_t self) #endif pci_write_config(self, PCIR_COMMAND, cmd, 2); - /* - * Some Sun PCIO-2 FireWire controllers have their intpin register - * bogusly set to 0, although it should be 3. Correct that. - */ - if (pci_get_devid(self) == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW) && - pci_get_intpin(self) == 0) - pci_set_intpin(self, 3); - latency = olatency = pci_read_config(self, PCIR_LATTIMER, 1); #define DEF_LATENCY 0x20 if (olatency < DEF_LATENCY) { diff --git a/sys/dev/firewire/fwohcireg.h b/sys/dev/firewire/fwohcireg.h index 775ad62fda1d..9d4626998987 100644 --- a/sys/dev/firewire/fwohcireg.h +++ b/sys/dev/firewire/fwohcireg.h @@ -49,7 +49,6 @@ #define FW_VENDORID_LUCENT 0x11c1 #define FW_VENDORID_INTEL 0x8086 #define FW_VENDORID_ADAPTEC 0x9004 -#define FW_VENDORID_SUN 0x108e #define FW_DEVICE_CS4210 (0x000f << 16) #define FW_DEVICE_UPD861 (0x0063 << 16) @@ -79,7 +78,6 @@ #define FW_DEVICE_FW322 (0x5811 << 16) #define FW_DEVICE_7007 (0x7007 << 16) #define FW_DEVICE_82372FB (0x7605 << 16) -#define FW_DEVICE_PCIO2FW (0x1102 << 16) #define PCI_INTERFACE_OHCI 0x10