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amd64: clean up empty lines in .c and .h files

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This commit is contained in:
Mateusz Guzik 2020-09-01 21:16:54 +00:00
parent df94ce0f90
commit 543769bf83
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=365067
38 changed files with 44 additions and 93 deletions
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1
sys/amd64/acpica/acpi_machdep.c
View File

@ -282,7 +282,6 @@ static device_method_t nexus_acpi_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, nexus_acpi_probe),
DEVMETHOD(device_attach, nexus_acpi_attach),
{ 0, 0 }
};

1
sys/amd64/amd64/bios.c
View File

@ -85,7 +85,6 @@ bios_sigsearch(u_int32_t start, u_char *sig, int siglen, int paralen, int sigofs
/* loop searching */
while ((sp + sigofs + siglen) < end) {
/* compare here */
if (!bcmp(sp + sigofs, sig, siglen)) {
/* convert back to physical address */

1
sys/amd64/amd64/copyout.c
View File

@ -177,7 +177,6 @@ DEFINE_IFUNC(, int, copyin, (const void *, void *, size_t))
return (copyin_smap_erms);
default:
return (copyin_nosmap_std);
}
}

2
sys/amd64/amd64/db_disasm.c
View File

@ -992,7 +992,6 @@ struct i_addr {
};
static const char * const db_reg[2][4][16] = {
{{"%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
"%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" },
{ "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
@ -1573,7 +1572,6 @@ db_disasm(db_addr_t loc, bool altfmt)
db_printf(",");
switch (i_mode & 0xFF) {
case E:
db_print_address(seg, size, rex, &address);
break;

5
sys/amd64/amd64/db_trace.c
View File

@ -454,7 +454,6 @@ amd64_set_watch(watchnum, watchaddr, size, access, d)
return (watchnum);
}
int
amd64_clr_watch(watchnum, d)
int watchnum;
@ -470,7 +469,6 @@ amd64_clr_watch(watchnum, d)
return (0);
}
int
db_md_set_watchpoint(addr, size)
db_expr_t addr;
@ -538,7 +536,6 @@ db_md_clr_watchpoint(addr, size)
if (DBREG_DRX((d), i) >= addr &&
DBREG_DRX((d), i) < addr + size)
amd64_clr_watch(i, d);
}
}
@ -554,7 +551,6 @@ db_md_clr_watchpoint(addr, size)
return (0);
}
static const char *
watchtype_str(type)
int type;
@ -567,7 +563,6 @@ watchtype_str(type)
}
}
void
db_md_list_watchpoints(void)
{

1
sys/amd64/amd64/fpu.c
View File

@ -1002,7 +1002,6 @@ static device_method_t fpupnp_methods[] = {
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
{ 0, 0 }
};

1
sys/amd64/amd64/gdb_machdep.c
View File

@ -138,4 +138,3 @@ gdb_end_write(void *arg)
restore_wp(arg != NULL);
}

2
sys/amd64/amd64/genassym.c
View File

@ -238,7 +238,7 @@ ASSYM(PC_IBPB_SET, offsetof(struct pcpu, pc_ibpb_set));
ASSYM(PC_MDS_TMP, offsetof(struct pcpu, pc_mds_tmp));
ASSYM(PC_MDS_BUF, offsetof(struct pcpu, pc_mds_buf));
ASSYM(PC_MDS_BUF64, offsetof(struct pcpu, pc_mds_buf64));
ASSYM(LA_EOI, LAPIC_EOI * LAPIC_MEM_MUL);
ASSYM(LA_ISR, LAPIC_ISR0 * LAPIC_MEM_MUL);

4
sys/amd64/amd64/machdep.c
View File

@ -575,7 +575,7 @@ sys_sigreturn(td, uap)
int
freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
{
return sys_sigreturn(td, (struct sigreturn_args *)uap);
}
#endif
@ -1807,7 +1807,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
initializecpu(); /* Initialize CPU registers */
amd64_bsp_ist_init(pc);
/* Set the IO permission bitmap (empty due to tss seg limit) */
pc->pc_common_tss.tss_iobase = sizeof(struct amd64tss) +
IOPERM_BITMAP_SIZE;

2
sys/amd64/amd64/mem.c
View File

@ -193,7 +193,7 @@ memioctl(struct cdev *dev __unused, u_long cmd, caddr_t data, int flags,
int nd, error = 0;
struct mem_range_op *mo = (struct mem_range_op *)data;
struct mem_range_desc *md;
/* is this for us? */
if ((cmd != MEMRANGE_GET) &&
(cmd != MEMRANGE_SET))

1
sys/amd64/amd64/mp_machdep.c
View File

@ -515,7 +515,6 @@ native_start_all_aps(void)
return (mp_naps);
}
/*
* This function starts the AP (application processor) identified
* by the APIC ID 'physicalCpu'. It does quite a "song and dance"

11
sys/amd64/amd64/pmap.c
View File

@ -1521,7 +1521,7 @@ static void
nkpt_init(vm_paddr_t addr)
{
int pt_pages;
#ifdef NKPT
pt_pages = NKPT;
#else
@ -3682,7 +3682,6 @@ pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
return PHYS_TO_DMAP(start);
}
/*
* Add a list of wired pages to the kva
* this routine is only used for temporary
@ -3755,7 +3754,7 @@ pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
m->flags &= ~PG_ZERO;
SLIST_INSERT_HEAD(free, m, plinks.s.ss);
}
/*
* Inserts the specified page table page into the specified pmap's collection
* of idle page table pages. Each of a pmap's page table pages is responsible
@ -4448,7 +4447,6 @@ pmap_allocpte(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
return (m);
}
/***************************************************
* Pmap allocation/deallocation routines.
***************************************************/
@ -4645,7 +4643,6 @@ pmap_growkernel(vm_offset_t addr)
}
}
/***************************************************
* page management routines.
***************************************************/
@ -5871,7 +5868,6 @@ pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
lock = NULL;
for (; sva < eva; sva = va_next) {
if (pmap->pm_stats.resident_count == 0)
break;
@ -6159,10 +6155,9 @@ pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
* fails. In that case, stale TLB entries are immediately
* invalidated.
*/
PMAP_LOCK(pmap);
for (; sva < eva; sva = va_next) {
pml4e = pmap_pml4e(pmap, sva);
if ((*pml4e & PG_V) == 0) {
va_next = (sva + NBPML4) & ~PML4MASK;

1
sys/amd64/amd64/trap.c
View File

@ -1137,7 +1137,6 @@ SYSCTL_PROC(_machdep, OID_AUTO, syscall_ret_flush_l1d, CTLTYPE_INT |
"Flush L1D on syscall return with error (0 - off, 1 - on, "
"2 - use hw only, 3 - use sw only");
/*
* System call handler for native binaries. The trap frame is already
* set up by the assembler trampoline and a pointer to it is saved in

2
sys/amd64/cloudabi64/cloudabi64_sysvec.c
View File

@ -57,7 +57,7 @@ cloudabi64_fixup_tcb(uintptr_t *stack_base, struct image_params *imgp)
error = cloudabi64_fixup(stack_base, imgp);
if (error != 0)
return (error);
/*
* On x86-64, the TCB is referred to by %fs:0. Take some space
* from the top of the stack to store a single element array,

2
sys/amd64/ia32/ia32_reg.c
View File

@ -153,7 +153,7 @@ fill_fpregs32(struct thread *td, struct fpreg32 *regs)
fpugetregs(td);
sv_fpu = get_pcb_user_save_td(td);
penv_xmm = &sv_fpu->sv_env;
/* FPU control/status */
penv_87->en_cw = penv_xmm->en_cw;
penv_87->en_sw = penv_xmm->en_sw;

2
sys/amd64/include/param.h
View File

@ -41,7 +41,6 @@
* $FreeBSD$
*/
#ifndef _AMD64_INCLUDE_PARAM_H_
#define _AMD64_INCLUDE_PARAM_H_
@ -51,7 +50,6 @@
* Machine dependent constants for AMD64.
*/
#define __HAVE_ACPI
#define __PCI_REROUTE_INTERRUPT

2
sys/amd64/include/pc/bios.h
View File

@ -63,7 +63,7 @@ struct bios_smap_xattr {
u_int32_t type;
u_int32_t xattr;
} __packed;
/*
* System Management BIOS
*/

3
sys/amd64/include/vmm.h
View File

@ -287,7 +287,6 @@ void vm_exit_reqidle(struct vm *vm, int vcpuid, uint64_t rip);
int vm_snapshot_req(struct vm *vm, struct vm_snapshot_meta *meta);
int vm_restore_time(struct vm *vm);
#ifdef _SYS__CPUSET_H_
/*
* Rendezvous all vcpus specified in 'dest' and execute 'func(arg)'.
@ -490,7 +489,7 @@ enum vm_intr_trigger {
EDGE_TRIGGER,
LEVEL_TRIGGER
};
/*
* The 'access' field has the format specified in Table 21-2 of the Intel
* Architecture Manual vol 3b.

1
sys/amd64/include/vmm_snapshot.h
View File

@ -100,7 +100,6 @@ struct vm_snapshot_meta {
enum vm_snapshot_op op;
};
void vm_snapshot_buf_err(const char *bufname, const enum vm_snapshot_op op);
int vm_snapshot_buf(volatile void *data, size_t data_size,
struct vm_snapshot_meta *meta);

1
sys/amd64/include/vmparam.h
View File

@ -43,7 +43,6 @@
* $FreeBSD$
*/
#ifndef _MACHINE_VMPARAM_H_
#define _MACHINE_VMPARAM_H_ 1

6
sys/amd64/linux/linux_proto.h
View File

@ -1615,42 +1615,36 @@ int linux_io_uring_register(struct thread *, struct linux_io_uring_register_args
#endif /* COMPAT_43 */
#ifdef COMPAT_FREEBSD4
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD4 */
#ifdef COMPAT_FREEBSD6
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD6 */
#ifdef COMPAT_FREEBSD7
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD7 */
#ifdef COMPAT_FREEBSD10
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD10 */
#ifdef COMPAT_FREEBSD11
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD11 */
#ifdef COMPAT_FREEBSD12
#define nosys linux_nosys

2
sys/amd64/linux32/linux32_machdep.c
View File

@ -89,7 +89,6 @@ struct l_old_select_argv {
l_uintptr_t timeout;
} __packed;
static void
bsd_to_linux_rusage(struct rusage *ru, struct l_rusage *lru)
{
@ -402,7 +401,6 @@ linux_set_cloned_tls(struct thread *td, void *desc)
if (error) {
linux_msg(td, "set_cloned_tls copyin info failed!");
} else {
/* We might copy out the entry_number as GUGS32_SEL. */
info.entry_number = GUGS32_SEL;
error = copyout(&info, desc, sizeof(struct l_user_desc));

6
sys/amd64/linux32/linux32_proto.h
View File

@ -1942,42 +1942,36 @@ int linux_io_uring_register(struct thread *, struct linux_io_uring_register_args
#endif /* COMPAT_43 */
#ifdef COMPAT_FREEBSD4
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD4 */
#ifdef COMPAT_FREEBSD6
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD6 */
#ifdef COMPAT_FREEBSD7
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD7 */
#ifdef COMPAT_FREEBSD10
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD10 */
#ifdef COMPAT_FREEBSD11
#define nosys linux_nosys
#endif /* COMPAT_FREEBSD11 */
#ifdef COMPAT_FREEBSD12
#define nosys linux_nosys

1
sys/amd64/linux32/linux32_sysvec.c
View File

@ -359,7 +359,6 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
mtx_lock(&psp->ps_mtx);
}
/*
* Send an interrupt to process.
*

1
sys/amd64/sgx/sgx.c
View File

@ -604,7 +604,6 @@ static struct cdev_pager_ops sgx_pg_ops = {
.cdev_pg_fault = sgx_pg_fault,
};
static void
sgx_insert_epc_page_by_index(vm_page_t page, vm_object_t object,
vm_pindex_t pidx)

6
sys/amd64/vmm/amd/amdvi_hw.c
View File

@ -356,7 +356,6 @@ amdvi_cmd_inv_iommu_pages(struct amdvi_softc *softc, uint16_t domain_id,
cmd = amdvi_get_cmd_tail(softc);
KASSERT(cmd != NULL, ("Cmd is NULL"));
cmd->opcode = AMDVI_INVD_PAGE_OPCODE;
cmd->word1 = domain_id;
/*
@ -729,7 +728,6 @@ amdvi_print_pci_cap(device_t dev)
struct amdvi_softc *softc;
uint32_t off, cap;
softc = device_get_softc(dev);
off = softc->cap_off;
@ -869,7 +867,6 @@ amdvi_alloc_intr_resources(struct amdvi_softc *softc)
return (0);
}
static void
amdvi_print_dev_cap(struct amdvi_softc *softc)
{
@ -1121,7 +1118,6 @@ amdvi_free_ptp(uint64_t *ptp, int level)
amdvi_free_ptp((uint64_t *)PHYS_TO_DMAP(ptp[i]
& AMDVI_PT_MASK), level - 1);
}
free(ptp, M_AMDVI);
@ -1304,7 +1300,7 @@ amdvi_set_dte(struct amdvi_domain *domain, uint16_t devid, bool enable)
struct amdvi_dte* temp;
KASSERT(domain, ("domain is NULL for pci_rid:0x%x\n", devid));
softc = amdvi_find_iommu(devid);
KASSERT(softc, ("softc is NULL for pci_rid:0x%x\n", devid));

5
sys/amd64/vmm/amd/ivrs_drv.c
View File

@ -105,7 +105,6 @@ ivrs_hdr_iterate_tbl(ivhd_iter_t iter, void *arg)
default:
printf("AMD-Vi:Not IVHD/IVMD type(%d)", ivrs_hdr->Type);
}
ivrs_hdr = (ACPI_IVRS_HEADER *)((uint8_t *)ivrs_hdr +
@ -424,7 +423,7 @@ ivhd_probe(device_t dev)
case IVRS_TYPE_HARDWARE_EFR:
device_set_desc(dev, "AMD-Vi/IOMMU ivhd with EFR");
break;
case IVRS_TYPE_HARDWARE_MIXED:
device_set_desc(dev, "AMD-Vi/IOMMU ivhd in mixed format");
break;
@ -588,7 +587,7 @@ ivhd_print_cap(struct amdvi_softc *softc, ACPI_IVRS_HARDWARE1 * ivhd)
int max_ptp_level;
dev = softc->dev;
ivhd_print_flag(dev, softc->ivhd_type, softc->ivhd_flag);
ivhd_print_feature(dev, softc->ivhd_type, softc->ivhd_feature);
ivhd_print_ext_feature(dev, softc->ext_feature);

4
sys/amd64/vmm/amd/npt.c
View File

@ -62,7 +62,7 @@ svm_npt_init(int ipinum)
TUNABLE_INT_FETCH("hw.vmm.npt.enable_superpage", &enable_superpage);
if (enable_superpage)
npt_flags |= PMAP_PDE_SUPERPAGE;
return (0);
}
@ -76,7 +76,7 @@ npt_pinit(pmap_t pmap)
struct vmspace *
svm_npt_alloc(vm_offset_t min, vm_offset_t max)
{
return (vmspace_alloc(min, max, npt_pinit));
}

3
sys/amd64/vmm/amd/svm.c
View File

@ -459,7 +459,6 @@ vmcb_init(struct svm_softc *sc, int vcpu, uint64_t iopm_base_pa,
svm_enable_intercept(sc, vcpu, VMCB_CR_INTCPT, mask);
}
/*
* Intercept everything when tracing guest exceptions otherwise
* just intercept machine check exception.
@ -821,7 +820,7 @@ npf_fault_type(uint64_t exitinfo1)
static bool
svm_npf_emul_fault(uint64_t exitinfo1)
{
if (exitinfo1 & VMCB_NPF_INFO1_ID) {
return (false);
}

2
sys/amd64/vmm/intel/vmcs.c
View File

@ -372,7 +372,7 @@ vmcs_init(struct vmcs *vmcs)
cr0 = vmm_get_host_cr0();
if ((error = vmwrite(VMCS_HOST_CR0, cr0)) != 0)
goto done;
cr4 = vmm_get_host_cr4() | CR4_VMXE;
if ((error = vmwrite(VMCS_HOST_CR4, cr4)) != 0)
goto done;

2
sys/amd64/vmm/intel/vmx_msr.c
View File

@ -456,7 +456,7 @@ vmx_wrmsr(struct vmx *vmx, int vcpuid, u_int num, uint64_t val, bool *retu)
uint64_t *guest_msrs;
uint64_t changed;
int error;
guest_msrs = vmx->guest_msrs[vcpuid];
error = 0;

6
sys/amd64/vmm/intel/vtd.c
View File

@ -171,7 +171,7 @@ domain_id(void)
if (dom == NULL)
break; /* found it */
}
if (id >= max_domains)
panic("domain ids exhausted");
@ -274,7 +274,7 @@ vtd_iotlb_global_invalidate(struct vtdmap *vtdmap)
offset = VTD_ECAP_IRO(vtdmap->ext_cap) * 16;
iotlb_reg = (volatile uint64_t *)((caddr_t)vtdmap + offset + 8);
*iotlb_reg = VTD_IIR_IVT | VTD_IIR_IIRG_GLOBAL |
VTD_IIR_DRAIN_READS | VTD_IIR_DRAIN_WRITES;
@ -753,7 +753,7 @@ static void
vtd_destroy_domain(void *arg)
{
struct domain *dom;
dom = arg;
SLIST_REMOVE(&domhead, dom, domain, next);

12
sys/amd64/vmm/io/ppt.c
View File

@ -478,7 +478,7 @@ pptintr(void *arg)
{
struct pptdev *ppt;
struct pptintr_arg *pptarg;
pptarg = arg;
ppt = pptarg->pptdev;
@ -556,7 +556,7 @@ ppt_setup_msi(struct vm *vm, int vcpu, int bus, int slot, int func,
/* success */
}
}
ppt->msi.startrid = startrid;
/*
@ -583,7 +583,7 @@ ppt_setup_msi(struct vm *vm, int vcpu, int bus, int slot, int func,
if (error != 0)
break;
}
if (i < numvec) {
ppt_teardown_msi(ppt);
return (ENXIO);
@ -676,17 +676,17 @@ ppt_setup_msix(struct vm *vm, int vcpu, int bus, int slot, int func,
&rid, RF_ACTIVE);
if (ppt->msix.res[idx] == NULL)
return (ENXIO);
ppt->msix.arg[idx].pptdev = ppt;
ppt->msix.arg[idx].addr = addr;
ppt->msix.arg[idx].msg_data = msg;
/* Setup the MSI-X interrupt */
error = bus_setup_intr(ppt->dev, ppt->msix.res[idx],
INTR_TYPE_NET | INTR_MPSAFE,
pptintr, NULL, &ppt->msix.arg[idx],
&ppt->msix.cookie[idx]);
if (error != 0) {
bus_release_resource(ppt->dev, SYS_RES_IRQ, rid, ppt->msix.res[idx]);
ppt->msix.cookie[idx] = NULL;

5
sys/amd64/vmm/io/vatpic.c
View File

@ -723,11 +723,11 @@ vatpic_master_handler(struct vm *vm, int vcpuid, bool in, int port, int bytes,
if (bytes != 1)
return (-1);
if (in) {
return (vatpic_read(vatpic, atpic, in, port, bytes, eax));
}
return (vatpic_write(vatpic, atpic, in, port, bytes, eax));
}
@ -841,7 +841,6 @@ vatpic_snapshot(struct vatpic *vatpic, struct vm_snapshot_meta *meta)
meta, ret, done);
SNAPSHOT_VAR_OR_LEAVE(atpic->lowprio, meta, ret, done);
SNAPSHOT_VAR_OR_LEAVE(atpic->intr_raised, meta, ret, done);
}
SNAPSHOT_BUF_OR_LEAVE(vatpic->elc, sizeof(vatpic->elc),

2
sys/amd64/vmm/io/vatpit.c
View File

@ -78,7 +78,6 @@ struct vatpit_callout_arg {
int channel_num;
};
struct channel {
int mode;
uint16_t initial; /* initial counter value */
@ -296,7 +295,6 @@ pit_readback(struct vatpit *vatpit, uint8_t cmd)
return (error);
}
static int
vatpit_update_mode(struct vatpit *vatpit, uint8_t val)
{

16
sys/amd64/vmm/io/vlapic.c
View File

@ -152,7 +152,7 @@ void
vlapic_id_write_handler(struct vlapic *vlapic)
{
struct LAPIC *lapic;
/*
* We don't allow the ID register to be modified so reset it back to
* its default value.
@ -202,7 +202,7 @@ vlapic_get_ccr(struct vlapic *vlapic)
struct bintime bt_now, bt_rem;
struct LAPIC *lapic;
uint32_t ccr;
ccr = 0;
lapic = vlapic->apic_page;
@ -233,7 +233,7 @@ vlapic_dcr_write_handler(struct vlapic *vlapic)
{
struct LAPIC *lapic;
int divisor;
lapic = vlapic->apic_page;
VLAPIC_TIMER_LOCK(vlapic);
@ -258,7 +258,7 @@ void
vlapic_esr_write_handler(struct vlapic *vlapic)
{
struct LAPIC *lapic;
lapic = vlapic->apic_page;
lapic->esr = vlapic->esr_pending;
vlapic->esr_pending = 0;
@ -383,7 +383,7 @@ vlapic_lvt_write_handler(struct vlapic *vlapic, uint32_t offset)
uint32_t *lvtptr, mask, val;
struct LAPIC *lapic;
int idx;
lapic = vlapic->apic_page;
lvtptr = vlapic_get_lvtptr(vlapic, offset);
val = *lvtptr;
@ -613,7 +613,7 @@ static __inline int
vlapic_periodic_timer(struct vlapic *vlapic)
{
uint32_t lvt;
lvt = vlapic_get_lvt(vlapic, APIC_OFFSET_TIMER_LVT);
return (vlapic_get_lvt_field(lvt, APIC_LVTT_TM_PERIODIC));
@ -1215,7 +1215,7 @@ vlapic_read(struct vlapic *vlapic, int mmio_access, uint64_t offset,
*data = 0;
goto done;
}
offset &= ~3;
switch(offset)
{
@ -1418,7 +1418,7 @@ static void
vlapic_reset(struct vlapic *vlapic)
{
struct LAPIC *lapic;
lapic = vlapic->apic_page;
bzero(lapic, sizeof(struct LAPIC));

8
sys/amd64/vmm/vmm.c
View File

@ -363,7 +363,7 @@ vmm_init(void)
error = vmm_mem_init();
if (error)
return (error);
if (vmm_is_intel())
ops = &vmm_ops_intel;
else if (vmm_is_svm())
@ -1075,7 +1075,7 @@ is_descriptor_table(int reg)
static bool
is_segment_register(int reg)
{
switch (reg) {
case VM_REG_GUEST_ES:
case VM_REG_GUEST_CS:
@ -1502,7 +1502,7 @@ vm_handle_inst_emul(struct vm *vm, int vcpuid, bool *retu)
vcpu->nextrip += vie->num_processed;
VCPU_CTR1(vm, vcpuid, "nextrip updated to %#lx after instruction "
"decoding", vcpu->nextrip);
/* return to userland unless this is an in-kernel emulated device */
if (gpa >= DEFAULT_APIC_BASE && gpa < DEFAULT_APIC_BASE + PAGE_SIZE) {
mread = lapic_mmio_read;
@ -2690,7 +2690,7 @@ vm_copyin(struct vm *vm, int vcpuid, struct vm_copyinfo *copyinfo, void *kaddr,
{
char *dst;
int idx;
dst = kaddr;
idx = 0;
while (len > 0) {

4
sys/amd64/vmm/vmm_stat.h
View File

@ -99,7 +99,7 @@ vmm_stat_array_incr(struct vm *vm, int vcpu, struct vmm_stat_type *vst,
{
#ifdef VMM_KEEP_STATS
uint64_t *stats;
stats = vcpu_stats(vm, vcpu);
if (vst->index >= 0 && statidx < vst->nelems)
@ -113,7 +113,7 @@ vmm_stat_array_set(struct vm *vm, int vcpu, struct vmm_stat_type *vst,
{
#ifdef VMM_KEEP_STATS
uint64_t *stats;
stats = vcpu_stats(vm, vcpu);
if (vst->index >= 0 && statidx < vst->nelems)