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bhyve(8): Fix uart emulation bug

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THRE is always asserted in LSR reads, so REG_IER writes that raise
IER_ETXRDY must also set thre_int_pending.

Reported by:	Illumos, according to emaste@
		https://twitter.com/ed_maste/status/1106195949087584258
MFC after:	2 weeks
This commit is contained in:
Conrad Meyer 2019-03-14 21:08:48 +00:00
parent 2352f97079
commit 55792380c3
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=345158
1 changed files with 3 additions and 0 deletions
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3
usr.sbin/bhyve/uart_emul.c
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@ -431,6 +431,9 @@ uart_write(struct uart_softc *sc, int offset, uint8_t value)
sc->thre_int_pending = true;
break;
case REG_IER:
/* Set pending when IER_ETXRDY is raised (edge-triggered). */
if ((sc->ier & IER_ETXRDY) == 0 && (value & IER_ETXRDY) != 0)
sc->thre_int_pending = true;
/*
* Apply mask so that bits 4-7 are 0
* Also enables bits 0-3 only if they're 1