cxgbe/t4_tom: Implement tod_pmtu_update.
tod_pmtu_update was added to the kernel in 01d74fe1ff.
Sponsored by: Chelsio Communications
This commit is contained in:
Navdeep Parhar
parent
2183bfcce4
commit
557c4521bb
@ -232,6 +232,7 @@ struct tom_tunables {
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int tx_zcopy;
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int cop_managed_offloading;
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int autorcvbuf_inc;
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int update_hc_on_pmtu_change;
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};
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/* iWARP driver tunables */
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@ -6844,6 +6844,12 @@ t4_sysctls(struct adapter *sc)
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CTLFLAG_RW, &sc->tt.autorcvbuf_inc, 0,
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"autorcvbuf increment");
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sc->tt.update_hc_on_pmtu_change = 1;
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SYSCTL_ADD_INT(ctx, children, OID_AUTO,
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"update_hc_on_pmtu_change", CTLFLAG_RW,
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&sc->tt.update_hc_on_pmtu_change, 0,
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"Update hostcache entry if the PMTU changes");
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SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "timer_tick",
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CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
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sysctl_tp_tick, "A", "TP timer tick (us)");
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@ -63,6 +63,7 @@ __FBSDID("$FreeBSD$");
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#include <netinet6/scope6_var.h>
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#define TCPSTATES
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#include <netinet/tcp_fsm.h>
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#include <netinet/tcp_seq.h>
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#include <netinet/tcp_timer.h>
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#include <netinet/tcp_var.h>
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#include <netinet/toecore.h>
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@ -841,6 +842,165 @@ t4_alloc_tls_session(struct toedev *tod, struct tcpcb *tp,
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}
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#endif
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/* SET_TCB_FIELD sent as a ULP command looks like this */
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#define LEN__SET_TCB_FIELD_ULP (sizeof(struct ulp_txpkt) + \
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sizeof(struct ulptx_idata) + sizeof(struct cpl_set_tcb_field_core))
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static void *
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mk_set_tcb_field_ulp(struct ulp_txpkt *ulpmc, uint64_t word, uint64_t mask,
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uint64_t val, uint32_t tid)
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{
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struct ulptx_idata *ulpsc;
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struct cpl_set_tcb_field_core *req;
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ulpmc->cmd_dest = htonl(V_ULPTX_CMD(ULP_TX_PKT) | V_ULP_TXPKT_DEST(0));
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ulpmc->len = htobe32(howmany(LEN__SET_TCB_FIELD_ULP, 16));
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ulpsc = (struct ulptx_idata *)(ulpmc + 1);
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ulpsc->cmd_more = htobe32(V_ULPTX_CMD(ULP_TX_SC_IMM));
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ulpsc->len = htobe32(sizeof(*req));
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req = (struct cpl_set_tcb_field_core *)(ulpsc + 1);
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OPCODE_TID(req) = htobe32(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
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req->reply_ctrl = htobe16(V_NO_REPLY(1));
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req->word_cookie = htobe16(V_WORD(word) | V_COOKIE(0));
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req->mask = htobe64(mask);
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req->val = htobe64(val);
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ulpsc = (struct ulptx_idata *)(req + 1);
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if (LEN__SET_TCB_FIELD_ULP % 16) {
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ulpsc->cmd_more = htobe32(V_ULPTX_CMD(ULP_TX_SC_NOOP));
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ulpsc->len = htobe32(0);
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return (ulpsc + 1);
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}
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return (ulpsc);
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}
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static void
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send_mss_flowc_wr(struct adapter *sc, struct toepcb *toep)
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{
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struct wrq_cookie cookie;
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struct fw_flowc_wr *flowc;
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struct ofld_tx_sdesc *txsd;
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const int flowclen = sizeof(*flowc) + sizeof(struct fw_flowc_mnemval);
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const int flowclen16 = howmany(flowclen, 16);
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if (toep->tx_credits < flowclen16 || toep->txsd_avail == 0) {
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CH_ERR(sc, "%s: tid %u out of tx credits (%d, %d).\n", __func__,
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toep->tid, toep->tx_credits, toep->txsd_avail);
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return;
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}
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flowc = start_wrq_wr(&toep->ofld_txq->wrq, flowclen16, &cookie);
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if (__predict_false(flowc == NULL)) {
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CH_ERR(sc, "ENOMEM in %s for tid %u.\n", __func__, toep->tid);
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return;
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}
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flowc->op_to_nparams = htobe32(V_FW_WR_OP(FW_FLOWC_WR) |
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V_FW_FLOWC_WR_NPARAMS(1));
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flowc->flowid_len16 = htonl(V_FW_WR_LEN16(flowclen16) |
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V_FW_WR_FLOWID(toep->tid));
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flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_MSS;
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flowc->mnemval[0].val = htobe32(toep->params.emss);
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txsd = &toep->txsd[toep->txsd_pidx];
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txsd->tx_credits = flowclen16;
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txsd->plen = 0;
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toep->tx_credits -= txsd->tx_credits;
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if (__predict_false(++toep->txsd_pidx == toep->txsd_total))
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toep->txsd_pidx = 0;
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toep->txsd_avail--;
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commit_wrq_wr(&toep->ofld_txq->wrq, flowc, &cookie);
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}
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static void
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t4_pmtu_update(struct toedev *tod, struct tcpcb *tp, tcp_seq seq, int mtu)
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{
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struct work_request_hdr *wrh;
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struct ulp_txpkt *ulpmc;
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int idx, len;
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struct wrq_cookie cookie;
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struct inpcb *inp = tp->t_inpcb;
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struct toepcb *toep = tp->t_toe;
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struct adapter *sc = td_adapter(toep->td);
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unsigned short *mtus = &sc->params.mtus[0];
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INP_WLOCK_ASSERT(inp);
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MPASS(mtu > 0); /* kernel is supposed to provide something usable. */
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/* tp->snd_una and snd_max are in host byte order too. */
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seq = be32toh(seq);
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CTR6(KTR_CXGBE, "%s: tid %d, seq 0x%08x, mtu %u, mtu_idx %u (%d)",
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__func__, toep->tid, seq, mtu, toep->params.mtu_idx,
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mtus[toep->params.mtu_idx]);
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if (ulp_mode(toep) == ULP_MODE_NONE && /* XXX: Read TCB otherwise? */
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(SEQ_LT(seq, tp->snd_una) || SEQ_GEQ(seq, tp->snd_max))) {
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CTR5(KTR_CXGBE,
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"%s: tid %d, seq 0x%08x not in range [0x%08x, 0x%08x).",
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__func__, toep->tid, seq, tp->snd_una, tp->snd_max);
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return;
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}
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/* Find the best mtu_idx for the suggested MTU. */
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for (idx = 0; idx < NMTUS - 1 && mtus[idx + 1] <= mtu; idx++)
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continue;
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if (idx >= toep->params.mtu_idx)
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return; /* Never increase the PMTU (just like the kernel). */
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/*
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* We'll send a compound work request with 2 SET_TCB_FIELDs -- the first
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* one updates the mtu_idx and the second one triggers a retransmit.
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*/
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len = sizeof(*wrh) + 2 * roundup2(LEN__SET_TCB_FIELD_ULP, 16);
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wrh = start_wrq_wr(toep->ctrlq, howmany(len, 16), &cookie);
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if (wrh == NULL) {
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CH_ERR(sc, "failed to change mtu_idx of tid %d (%u -> %u).\n",
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toep->tid, toep->params.mtu_idx, idx);
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return;
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}
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INIT_ULPTX_WRH(wrh, len, 1, 0); /* atomic */
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ulpmc = (struct ulp_txpkt *)(wrh + 1);
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ulpmc = mk_set_tcb_field_ulp(ulpmc, W_TCB_T_MAXSEG,
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V_TCB_T_MAXSEG(M_TCB_T_MAXSEG), V_TCB_T_MAXSEG(idx), toep->tid);
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ulpmc = mk_set_tcb_field_ulp(ulpmc, W_TCB_TIMESTAMP,
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V_TCB_TIMESTAMP(0x7FFFFULL << 11), 0, toep->tid);
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commit_wrq_wr(toep->ctrlq, wrh, &cookie);
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/* Update the software toepcb and tcpcb. */
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toep->params.mtu_idx = idx;
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tp->t_maxseg = mtus[toep->params.mtu_idx];
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if (inp->inp_inc.inc_flags & INC_ISIPV6)
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tp->t_maxseg -= sizeof(struct ip6_hdr) + sizeof(struct tcphdr);
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else
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tp->t_maxseg -= sizeof(struct ip) + sizeof(struct tcphdr);
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toep->params.emss = tp->t_maxseg;
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if (tp->t_flags & TF_RCVD_TSTMP)
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toep->params.emss -= TCPOLEN_TSTAMP_APPA;
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/* Update the firmware flowc. */
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send_mss_flowc_wr(sc, toep);
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/* Update the MTU in the kernel's hostcache. */
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if (sc->tt.update_hc_on_pmtu_change != 0) {
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struct in_conninfo inc = {0};
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inc.inc_fibnum = inp->inp_inc.inc_fibnum;
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if (inp->inp_inc.inc_flags & INC_ISIPV6) {
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inc.inc_flags |= INC_ISIPV6;
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inc.inc6_faddr = inp->inp_inc.inc6_faddr;
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} else {
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inc.inc_faddr = inp->inp_inc.inc_faddr;
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}
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tcp_hc_updatemtu(&inc, mtu);
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}
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CTR6(KTR_CXGBE, "%s: tid %d, mtu_idx %u (%u), t_maxseg %u, emss %u",
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__func__, toep->tid, toep->params.mtu_idx,
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mtus[toep->params.mtu_idx], tp->t_maxseg, toep->params.emss);
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}
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/*
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* The TOE driver will not receive any more CPLs for the tid associated with the
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* toepcb; release the hold on the inpcb.
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@ -1754,6 +1914,7 @@ t4_tom_activate(struct adapter *sc)
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#ifdef KERN_TLS
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tod->tod_alloc_tls_session = t4_alloc_tls_session;
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#endif
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tod->tod_pmtu_update = t4_pmtu_update;
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for_each_port(sc, i) {
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for_each_vi(sc->port[i], v, vi) {
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