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Define the MSR used to fetch the current microcode patch level on AMD.

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It is defined in the AMD family 17h register reference.

MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
This commit is contained in:
Mark Johnston 2018-07-13 19:42:59 +00:00
parent 949662216a
commit 5612bb23d0
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=336257
1 changed files with 1 additions and 0 deletions
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sys/x86/include/specialreg.h
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@ -973,6 +973,7 @@
#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */
/* AMD64 MSR's */
#define MSR_PATCH_LEVEL 0x0000008b /* microcode revision number */
#define MSR_EFER 0xc0000080 /* extended features */
#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target/cs/ss */
#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target rip */