Define the MSR used to fetch the current microcode patch level on AMD.
It is defined in the AMD family 17h register reference. MFC after: 3 days Sponsored by: The FreeBSD Foundation
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=336257
@ -973,6 +973,7 @@
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#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */
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/* AMD64 MSR's */
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#define MSR_PATCH_LEVEL 0x0000008b /* microcode revision number */
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#define MSR_EFER 0xc0000080 /* extended features */
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#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target/cs/ss */
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#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target rip */
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