diff --git a/sys/i386/i386/initcpu.c b/sys/i386/i386/initcpu.c
index 5f33897360c6..71c57b258168 100644
--- a/sys/i386/i386/initcpu.c
+++ b/sys/i386/i386/initcpu.c
@@ -423,6 +423,19 @@ init_6x86(void)
 #endif /* I486_CPU */
 
 #ifdef I586_CPU
+/*
+ * Rise mP6
+ */
+static void
+init_rise(void)
+{
+
+	/*
+	 * The CMPXCHG8B instruction is always available but hidden.
+	 */
+	cpu_feature |= CPUID_CX8;
+}
+
 /*
  * IDT WinChip C6/2/2A/2B/3
  *
@@ -690,6 +703,9 @@ initializecpu(void)
 		case CPU_VENDOR_TRANSMETA:
 			init_transmeta();
 			break;
+		case CPU_VENDOR_RISE:
+			init_rise();
+			break;
 		}
 		break;
 #endif
diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c
index be391b6988ee..f62854bdc668 100644
--- a/sys/i386/i386/machdep.c
+++ b/sys/i386/i386/machdep.c
@@ -1557,8 +1557,7 @@ static void
 cpu_probe_cmpxchg8b(void)
 {
 
-	if ((cpu_feature & CPUID_CX8) != 0 ||
-	    cpu_vendor_id == CPU_VENDOR_RISE) {
+	if ((cpu_feature & CPUID_CX8) != 0) {
 		atomic_load_acq_64 = atomic_load_acq_64_i586;
 		atomic_store_rel_64 = atomic_store_rel_64_i586;
 	}