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RPI: Fix DMA/SDHCI on the BCM2836 (Raspberry Pi 2)

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r354875 pushed VCBUS <-> ARMC translations to runtime determination, but
incorrectly mapped addresses for the BCM2836 -- SOC_BCM2835 and SOC_BCM2836
are actually mutually exclusive, so the BCM2836 config (GENERIC) would have
taken the latter path in the header and used 0x3f000000 as peripheral start.

Easily fixed -- split out the BCM2836 into its own memmap config and use
that instead if SOC_BCM2836 is included. With this, we get back to userland
again.

Reported by:	Marek Zarychta <zarychtam@plan-b.pwste.edu.pl>
This commit is contained in:
Kyle Evans 2019-12-09 17:34:40 +00:00
parent 670f36540d
commit 5910fe02d6
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=355563
2 changed files with 25 additions and 3 deletions
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22
sys/arm/broadcom/bcm2835/bcm2835_vcbus.c
View File

@ -67,7 +67,7 @@ struct bcm283x_memory_mapping {
vm_paddr_t vcbus_start;
};
#if defined(SOC_BCM2835) || defined(SOC_BCM2836)
#ifdef SOC_BCM2835
static struct bcm283x_memory_mapping bcm2835_memmap[] = {
{
/* SDRAM */
@ -85,6 +85,24 @@ static struct bcm283x_memory_mapping bcm2835_memmap[] = {
};
#endif
#ifdef SOC_BCM2836
static struct bcm283x_memory_mapping bcm2836_memmap[] = {
{
/* SDRAM */
.armc_start = 0x00000000,
.armc_size = BCM2836_ARM_IO_BASE,
.vcbus_start = BCM2836_VCBUS_SDRAM_BASE,
},
{
/* Peripherals */
.armc_start = BCM2836_ARM_IO_BASE,
.armc_size = BCM28XX_ARM_IO_SIZE,
.vcbus_start = BCM2836_VCBUS_IO_BASE,
},
{ 0, 0, 0 },
};
#endif
#ifdef SOC_BRCM_BCM2837
static struct bcm283x_memory_mapping bcm2837_memmap[] = {
{
@ -142,7 +160,7 @@ static struct bcm283x_memory_soc_cfg {
#endif
#ifdef SOC_BCM2836
{
.memmap = bcm2835_memmap,
.memmap = bcm2836_memmap,
.soc_compat = "brcm,bcm2836",
.busdma_lowaddr = BUS_SPACE_MAXADDR_32BIT,
},

6
sys/arm/broadcom/bcm2835/bcm2835_vcbus.h
View File

@ -42,7 +42,11 @@
#define BCM2835_VCBUS_IO_BASE 0x7E000000
#define BCM2835_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_CACHED
#define BCM2837_ARM_IO_BASE 0x3f000000
#define BCM2836_ARM_IO_BASE 0x3f000000
#define BCM2836_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
#define BCM2836_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED
#define BCM2837_ARM_IO_BASE BCM2836_ARM_IO_BASE
#define BCM2837_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
#define BCM2837_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED