powerpc/pseries: Allow radix pmap in pseries for ISA 3.0
ISA 3.0 allows for nested radix translations with minimal to no involvement of the hypervisor. This should make pseries signficantly faster on POWER9 pseries instances, as fewer hypercalls are needed to manage pmap now. MFC after: 2 weeks Relnotes: yes
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@ -25,7 +25,7 @@ POWERMAC opt_platform.h
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PS3 opt_platform.h
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PS3 opt_platform.h
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MAMBO
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MAMBO
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POWERNV opt_platform.h
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POWERNV opt_platform.h
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PSERIES
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PSERIES opt_platform.h
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PSIM
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PSIM
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QEMU opt_platform.h
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QEMU opt_platform.h
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@ -25,6 +25,8 @@
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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__FBSDID("$FreeBSD$");
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@ -84,6 +86,9 @@ __FBSDID("$FreeBSD$");
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#include <machine/trap.h>
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#include <machine/trap.h>
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#include <machine/mmuvar.h>
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#include <machine/mmuvar.h>
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/* For pseries bit. */
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#include <powerpc/pseries/phyp-hvcall.h>
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#ifdef INVARIANTS
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#ifdef INVARIANTS
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#include <vm/uma_dbg.h>
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#include <vm/uma_dbg.h>
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#endif
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#endif
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@ -93,6 +98,7 @@ __FBSDID("$FreeBSD$");
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#define PPC_BITLSHIFT_VAL(val, bit) ((val) << PPC_BITLSHIFT(bit))
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#define PPC_BITLSHIFT_VAL(val, bit) ((val) << PPC_BITLSHIFT(bit))
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#include "opt_ddb.h"
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#include "opt_ddb.h"
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#ifdef DDB
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#ifdef DDB
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static void pmap_pte_walk(pml1_entry_t *l1, vm_offset_t va);
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static void pmap_pte_walk(pml1_entry_t *l1, vm_offset_t va);
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#endif
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#endif
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@ -780,8 +786,10 @@ mmu_radix_tlbiel_flush(int scope)
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static void
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static void
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mmu_radix_tlbie_all()
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mmu_radix_tlbie_all()
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{
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{
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/* TODO: LPID invalidate */
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if (powernv_enabled)
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL);
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL);
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else
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_LPID);
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}
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}
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static void
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static void
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@ -2024,11 +2032,14 @@ mmu_radix_early_bootstrap(vm_offset_t start, vm_offset_t end)
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*/
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*/
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if (isa3_pid_bits == 0)
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if (isa3_pid_bits == 0)
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isa3_pid_bits = 20;
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isa3_pid_bits = 20;
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parttab_phys = moea64_bootstrap_alloc(PARTTAB_SIZE, PARTTAB_SIZE);
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if (powernv_enabled) {
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parttab_phys =
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moea64_bootstrap_alloc(PARTTAB_SIZE, PARTTAB_SIZE);
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validate_addr(parttab_phys, PARTTAB_SIZE);
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validate_addr(parttab_phys, PARTTAB_SIZE);
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for (int i = 0; i < PARTTAB_SIZE/PAGE_SIZE; i++)
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for (int i = 0; i < PARTTAB_SIZE/PAGE_SIZE; i++)
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pagezero(PHYS_TO_DMAP(parttab_phys + i * PAGE_SIZE));
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pagezero(PHYS_TO_DMAP(parttab_phys + i * PAGE_SIZE));
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}
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proctab_size = 1UL << PROCTAB_SIZE_SHIFT;
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proctab_size = 1UL << PROCTAB_SIZE_SHIFT;
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proctab0pa = moea64_bootstrap_alloc(proctab_size, proctab_size);
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proctab0pa = moea64_bootstrap_alloc(proctab_size, proctab_size);
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validate_addr(proctab0pa, proctab_size);
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validate_addr(proctab0pa, proctab_size);
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@ -2181,12 +2192,20 @@ mmu_radix_proctab_init(void)
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htobe64(RTS_SIZE | DMAP_TO_PHYS((vm_offset_t)kernel_pmap->pm_pml1) |
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htobe64(RTS_SIZE | DMAP_TO_PHYS((vm_offset_t)kernel_pmap->pm_pml1) |
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RADIX_PGD_INDEX_SHIFT);
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RADIX_PGD_INDEX_SHIFT);
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if (powernv_enabled) {
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mmu_radix_proctab_register(proctab0pa, PROCTAB_SIZE_SHIFT - 12);
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mmu_radix_proctab_register(proctab0pa, PROCTAB_SIZE_SHIFT - 12);
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__asm __volatile("ptesync" : : : "memory");
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__asm __volatile("ptesync" : : : "memory");
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__asm __volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
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__asm __volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
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"r" (TLBIEL_INVAL_SET_LPID), "r" (0));
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"r" (TLBIEL_INVAL_SET_LPID), "r" (0));
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__asm __volatile("eieio; tlbsync; ptesync" : : : "memory");
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__asm __volatile("eieio; tlbsync; ptesync" : : : "memory");
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#ifdef PSERIES
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} else {
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phyp_hcall(H_REGISTER_PROC_TBL,
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PROC_TABLE_NEW | PROC_TABLE_RADIX | PROC_TABLE_GTSE,
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proctab0pa, 0, PROCTAB_SIZE_SHIFT - 12);
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#endif
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}
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if (bootverbose)
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if (bootverbose)
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printf("process table %p and kernel radix PDE: %p\n",
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printf("process table %p and kernel radix PDE: %p\n",
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isa3_proctab, kernel_pmap->pm_pml1);
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isa3_proctab, kernel_pmap->pm_pml1);
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@ -2326,6 +2345,7 @@ mmu_radix_bootstrap(vm_offset_t start, vm_offset_t end)
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if (bootverbose)
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if (bootverbose)
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printf("%s\n", __func__);
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printf("%s\n", __func__);
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hw_direct_map = 1;
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hw_direct_map = 1;
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powernv_enabled = (mfmsr() & PSL_HV) ? 1 : 0;
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mmu_radix_early_bootstrap(start, end);
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mmu_radix_early_bootstrap(start, end);
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if (bootverbose)
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if (bootverbose)
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printf("early bootstrap complete\n");
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printf("early bootstrap complete\n");
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@ -2340,8 +2360,10 @@ mmu_radix_bootstrap(vm_offset_t start, vm_offset_t end)
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mmu_radix_init_iamr();
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mmu_radix_init_iamr();
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mmu_radix_proctab_init();
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mmu_radix_proctab_init();
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mmu_radix_pid_set(kernel_pmap);
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mmu_radix_pid_set(kernel_pmap);
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/* XXX assume CPU_FTR_HVMODE */
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if (powernv_enabled)
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL);
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL);
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else
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_LPID);
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mmu_radix_late_bootstrap(start, end);
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mmu_radix_late_bootstrap(start, end);
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numa_mem_regions(&numa_pregions, &numa_pregions_sz);
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numa_mem_regions(&numa_pregions, &numa_pregions_sz);
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@ -2368,7 +2390,10 @@ mmu_radix_cpu_bootstrap(int ap)
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}
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}
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mmu_radix_init_iamr();
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mmu_radix_init_iamr();
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mmu_radix_pid_set(kernel_pmap);
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mmu_radix_pid_set(kernel_pmap);
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if (powernv_enabled)
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL);
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL);
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else
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mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_LPID);
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}
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}
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static SYSCTL_NODE(_vm_pmap, OID_AUTO, l3e, CTLFLAG_RD, 0,
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static SYSCTL_NODE(_vm_pmap, OID_AUTO, l3e, CTLFLAG_RD, 0,
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@ -177,6 +177,16 @@
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#define H_SET_MODE_RSRC_ILE 0x4 /* PAPR 2.8 / ISA 2.07 */
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#define H_SET_MODE_RSRC_ILE 0x4 /* PAPR 2.8 / ISA 2.07 */
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#define H_SET_MODE_RSRC_DAWR1 0x5 /* ISA 3.1 Future support */
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#define H_SET_MODE_RSRC_DAWR1 0x5 /* ISA 3.1 Future support */
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/* H_REGISTER_PROC_TBL identifiers. */
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#define PROC_TABLE_OP_MASK 0x18
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#define PROC_TABLE_DEREG 0x10
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#define PROC_TABLE_NEW 0x18
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#define PROC_TABLE_TYPE_MASK 0x06
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#define PROC_TABLE_HPT_SLB 0x00
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#define PROC_TABLE_GTSE 0x01
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#define PROC_TABLE_HPT_PT 0x02
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#define PROC_TABLE_RADIX 0x04
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/* pSeries hypervisor opcodes. */
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/* pSeries hypervisor opcodes. */
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#define H_REMOVE 0x04
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#define H_REMOVE 0x04
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#define H_ENTER 0x08
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#define H_ENTER 0x08
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@ -154,6 +154,7 @@ chrp_attach(platform_t plat)
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realmaxaddr = MAX(off, realmaxaddr);
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realmaxaddr = MAX(off, realmaxaddr);
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}
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}
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if (!radix_mmu)
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pmap_mmu_install("mmu_phyp", BUS_PROBE_SPECIFIC);
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pmap_mmu_install("mmu_phyp", BUS_PROBE_SPECIFIC);
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cpu_idle_hook = phyp_cpu_idle;
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cpu_idle_hook = phyp_cpu_idle;
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