Merge commit f0990e104 from llvm git (by Justin Hibbits):
[PowerPC]: e500 target can't use lwsync, use msync instead The e500 core has a silicon bug that triggers an illegal instruction program trap on any sync other than msync. Other cores will typically ignore illegal sync types, and the documentation even implies that the 'illegal' bits are ignored. Address this hardware deficiency by only using msync, like the PPC440. Differential Revision: https://reviews.llvm.org/D76614 Requested by: jhibbits MFC after: 6 weeks X-MFC-With: 358851
This commit is contained in:
parent
4596ac234e
commit
5b5f869e87
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=359333
@ -442,7 +442,7 @@ def : ProcessorModel<"g5", G5Model,
|
|||||||
def : ProcessorModel<"e500", PPCE500Model,
|
def : ProcessorModel<"e500", PPCE500Model,
|
||||||
[DirectiveE500,
|
[DirectiveE500,
|
||||||
FeatureICBT, FeatureBookE,
|
FeatureICBT, FeatureBookE,
|
||||||
FeatureISEL, FeatureMFTB, FeatureSPE]>;
|
FeatureISEL, FeatureMFTB, FeatureMSYNC, FeatureSPE]>;
|
||||||
def : ProcessorModel<"e500mc", PPCE500mcModel,
|
def : ProcessorModel<"e500mc", PPCE500mcModel,
|
||||||
[DirectiveE500mc,
|
[DirectiveE500mc,
|
||||||
FeatureSTFIWX, FeatureICBT, FeatureBookE,
|
FeatureSTFIWX, FeatureICBT, FeatureBookE,
|
||||||
|
Loading…
Reference in New Issue
Block a user