Document the fact that some Core2 family CPUs lack fixed-function counters.
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.\" Copyright (c) 2008 Joseph Koshy. All rights reserved.
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.\" Copyright (c) 2008,2009 Joseph Koshy. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\"
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.\" $FreeBSD$
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.\"
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.Dd November 12, 2008
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.Dd June 8, 2009
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.Os
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.Dt PMC.CORE2 3
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.Sh NAME
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CPUs contain PMCs conforming to version 2 of the
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.Tn Intel
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performance measurement architecture.
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These CPUs contains two classes of PMCs:
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These CPUs may contain upto two classes of PMCs:
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.Bl -tag -width "Li PMC_CLASS_IAP"
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.It Li PMC_CLASS_IAF
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Fixed-function counters that count only one hardware event per counter.
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@ -66,6 +66,7 @@ Intel Core2 PMCs are documented in
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.Ss CORE2 FIXED FUNCTION PMCS
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These PMCs and their supported events are documented in
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.Xr pmc.iaf 3 .
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Not all CPUs in this family implement fixed-function counters.
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.Ss CORE2 PROGRAMMABLE PMCS
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The programmable PMCs support the following capabilities:
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.Bl -column "PMC_CAP_INTERRUPT" "Support"
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