Import device-tree files from Linux 5.11
Sponsored by: Diablotin Systems
This commit is contained in:
Emmanuel Vadot
commit
5def4c47d4
@ -10,7 +10,7 @@ DT_SCHEMA_MIN_VERSION = 2020.8.1
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PHONY += check_dtschema_version
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check_dtschema_version:
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@{ echo $(DT_SCHEMA_MIN_VERSION); \
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$(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -VC || \
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$(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -Vc >/dev/null || \
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{ echo "ERROR: dtschema minimum version is v$(DT_SCHEMA_MIN_VERSION)" >&2; false; }
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quiet_cmd_extract_ex = DTEX $@
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@ -27,17 +27,17 @@ find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \
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-name '*.example.dt.yaml' \)
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quiet_cmd_yamllint = LINT $(src)
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cmd_yamllint = $(find_cmd) | \
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xargs $(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint
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cmd_yamllint = ($(find_cmd) | \
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xargs $(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint) || true
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quiet_cmd_chk_bindings = CHKDT $@
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cmd_chk_bindings = $(find_cmd) | \
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xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src)
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cmd_chk_bindings = ($(find_cmd) | \
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xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src)) || true
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quiet_cmd_mk_schema = SCHEMA $@
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cmd_mk_schema = f=$$(mktemp) ; \
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$(if $(DT_MK_SCHEMA_FLAGS), \
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echo $(real-prereqs), \
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printf '%s\n' $(real-prereqs), \
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$(find_cmd)) > $$f ; \
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$(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f > $@ ; \
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rm -f $$f
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@ -78,10 +78,10 @@ $(obj)/processed-schema.json: $(DT_SCHEMA_FILES) check_dtschema_version FORCE
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endif
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extra-$(CHECK_DT_BINDING) += processed-schema-examples.json
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extra-$(CHECK_DTBS) += processed-schema.json
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extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES))
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extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES))
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always-$(CHECK_DT_BINDING) += processed-schema-examples.json
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always-$(CHECK_DTBS) += processed-schema.json
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always-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES))
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always-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES))
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# Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of
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# build artifacts here before they are processed by scripts/Makefile.clean
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@ -151,6 +151,7 @@ properties:
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- description: Boards with the Amlogic Meson G12B S922X SoC
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items:
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- enum:
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- azw,gsking-x
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- azw,gtking
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- azw,gtking-pro
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- hardkernel,odroid-n2
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@ -163,9 +164,10 @@ properties:
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- description: Boards with the Amlogic Meson SM1 S905X3/D3/Y3 SoC
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items:
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- enum:
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- seirobotics,sei610
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- khadas,vim3l
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- hardkernel,odroid-c4
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- hardkernel,odroid-hc4
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- khadas,vim3l
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- seirobotics,sei610
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- const: amlogic,sm1
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- description: Boards with the Amlogic Meson A1 A113L SoC
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@ -0,0 +1,42 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
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maintainers:
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- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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description: |
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The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
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contains registers for various IP blocks such as pin-controller bits for
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the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
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The registers can be accessed directly when not running in "secure mode".
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When "secure mode" is enabled then these registers have to be accessed
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through secure monitor calls.
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properties:
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compatible:
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items:
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- enum:
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- amlogic,meson8-secbus2
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- amlogic,meson8b-secbus2
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- const: syscon
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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secbus2: system-controller@4000 {
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compatible = "amlogic,meson8-secbus2", "syscon";
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reg = <0x4000 0x2000>;
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};
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@ -31,6 +31,14 @@ Optional properties:
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- mbox-names: shall be "tx" or "rx" depending on mboxes entries.
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- interrupts : when using smc or hvc transports, this optional
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property indicates that msg completion by the platform is indicated
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by an interrupt rather than by the return of the smc call. This
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should not be used except when the platform requires such behavior.
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- interrupt-names : if "interrupts" is present, interrupt-names must also
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be present and have the value "a2p".
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See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details
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about the generic mailbox controller and client driver bindings.
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@ -62,6 +70,20 @@ Required properties:
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- #power-domain-cells : Should be 1. Contains the device or the power
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domain ID value used by SCMI commands.
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Regulator bindings for the SCMI Regulator based on SCMI Message Protocol
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------------------------------------------------------------
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An SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain,
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and should be always positioned as a root regulator.
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It does not support any current operation.
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SCMI Regulators are grouped under a 'regulators' node which in turn is a child
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of the SCMI Voltage protocol node inside the desired SCMI instance node.
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This binding uses the common regulator binding[6].
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Required properties:
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- reg : shall identify an existent SCMI Voltage Domain.
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Sensor bindings for the sensors based on SCMI Message Protocol
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--------------------------------------------------------------
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SCMI provides an API to access the various sensors on the SoC.
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@ -105,6 +127,7 @@ Required sub-node properties:
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[3] Documentation/devicetree/bindings/thermal/thermal*.yaml
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[4] Documentation/devicetree/bindings/sram/sram.yaml
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[5] Documentation/devicetree/bindings/reset/reset.txt
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[6] Documentation/devicetree/bindings/regulator/regulator.yaml
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Example:
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@ -169,6 +192,25 @@ firmware {
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reg = <0x16>;
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#reset-cells = <1>;
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};
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scmi_voltage: protocol@17 {
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reg = <0x17>;
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regulators {
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regulator_devX: regulator@0 {
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reg = <0x0>;
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regulator-max-microvolt = <3300000>;
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};
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regulator_devY: regulator@9 {
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reg = <0x9>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <4200000>;
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};
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...
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};
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};
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};
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};
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@ -1,7 +1,7 @@
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Atmel system registers
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Chipid required properties:
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- compatible: Should be "atmel,sama5d2-chipid"
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- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
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- reg : Should contain registers location and length
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PIT Timer required properties:
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@ -91,7 +91,8 @@ SHDWC SAMA5D2-Compatible Shutdown Controller
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1) shdwc node
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required properties:
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- compatible: should be "atmel,sama5d2-shdwc" or "microchip,sam9x60-shdwc".
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- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
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"microchip,sama7g5-shdwc"
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- reg: should contain registers location and length
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- clocks: phandle to input clock.
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- #address-cells: should be one. The cell is the wake-up input index.
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@ -103,7 +104,7 @@ optional properties:
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microseconds. It's usually a board-related property.
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- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
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optional microchip,sam9x60-shdwc properties:
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optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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The node contains child nodes for each wake-up input that the platform uses.
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40
sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm4908.yaml
Normal file
40
sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm4908.yaml
Normal file
@ -0,0 +1,40 @@
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom BCM4908 device tree bindings
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description:
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Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs.
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maintainers:
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- Rafał Miłecki <rafal@milecki.pl>
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properties:
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$nodename:
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const: '/'
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compatible:
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oneOf:
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- description: BCM4906 based boards
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items:
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- enum:
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- netgear,r8000p
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- const: brcm,bcm4906
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- const: brcm,bcm4908
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- description: BCM4908 based boards
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items:
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- enum:
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- asus,gt-ac5300
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- const: brcm,bcm4908
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- description: BCM49408 based boards
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items:
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- const: brcm,bcm49408
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- const: brcm,bcm4908
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additionalProperties: true
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...
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@ -34,9 +34,12 @@ its hardware characteristcs.
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Program Flow Trace Macrocell:
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"arm,coresight-etm3x", "arm,primecell";
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- Embedded Trace Macrocell (version 4.x):
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- Embedded Trace Macrocell (version 4.x), with memory mapped access.
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"arm,coresight-etm4x", "arm,primecell";
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- Embedded Trace Macrocell (version 4.x), with system register access only.
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"arm,coresight-etm4x-sysreg";
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- Coresight programmable Replicator :
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"arm,coresight-dynamic-replicator", "arm,primecell";
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@ -169,6 +169,7 @@ properties:
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- qcom,kryo385
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- qcom,kryo468
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- qcom,kryo485
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- qcom,kryo685
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- qcom,scorpion
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enable-method:
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@ -232,7 +233,6 @@ properties:
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by this cpu (see ./idle-states.yaml).
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capacity-dmips-mhz:
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$ref: '/schemas/types.yaml#/definitions/uint32'
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description:
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u32 value representing CPU capacity (see ./cpu-capacity.txt) in
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DMIPS/MHz, relative to highest capacity-dmips-mhz
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@ -89,7 +89,10 @@ Required properties:
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"fsl,imx8qm-clock"
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"fsl,imx8qxp-clock"
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followed by "fsl,scu-clk"
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- #clock-cells: Should be 1. Contains the Clock ID value.
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- #clock-cells: Should be either
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2: Contains the Resource and Clock ID value.
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or
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1: Contains the Clock ID value. (DEPRECATED)
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- clocks: List of clock specifiers, must contain an entry for
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each required entry in clock-names
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- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz"
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@ -208,7 +211,7 @@ firmware {
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clk: clk {
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compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
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#clock-cells = <1>;
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#clock-cells = <2>;
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};
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iomuxc {
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@ -263,8 +266,7 @@ serial@5a060000 {
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...
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpuart0>;
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clocks = <&clk IMX8QXP_UART0_CLK>,
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<&clk IMX8QXP_UART0_IPG_CLK>;
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clock-names = "per", "ipg";
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clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
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clock-names = "ipg";
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power-domains = <&pd IMX_SC_R_UART_0>;
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};
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@ -33,16 +33,57 @@ properties:
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items:
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- enum:
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- fsl,imx25-pdk
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- karo,imx25-tx25
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- const: fsl,imx25
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- description: i.MX27 Product Development Kit
|
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- description: i.MX25 Eukrea CPUIMX25 Boards
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items:
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- enum:
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- eukrea,mbimxsd25-baseboard # Eukrea MBIMXSD25
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- const: eukrea,cpuimx25
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- const: fsl,imx25
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- description: i.MX25 Eukrea MBIMXSD25 Boards
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items:
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- enum:
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- eukrea,mbimxsd25-baseboard-cmo-qvga
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- eukrea,mbimxsd25-baseboard-dvi-svga
|
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- eukrea,mbimxsd25-baseboard-dvi-vga
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- const: eukrea,mbimxsd25-baseboard
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- const: eukrea,cpuimx25
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- const: fsl,imx25
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|
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- description: i.MX27 based Boards
|
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items:
|
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- enum:
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- armadeus,imx27-apf27 # APF27 SoM
|
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- armadeus,imx27-apf27dev # APF27 SoM on APF27Dev board
|
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- fsl,imx27-pdk
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- const: fsl,imx27
|
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|
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- description: i.MX27 APF27 SoM Board
|
||||
items:
|
||||
- const: armadeus,imx27-apf27dev
|
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- const: armadeus,imx27-apf27
|
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- const: fsl,imx27
|
||||
|
||||
- description: i.MX27 Eukrea CPUIMX27 SoM Board
|
||||
items:
|
||||
- const: eukrea,mbimxsd27-baseboard
|
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- const: eukrea,cpuimx27
|
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- const: fsl,imx27
|
||||
|
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- description: i.MX27 Phytec pca100 Board
|
||||
items:
|
||||
- const: phytec,imx27-pca100-rdk
|
||||
- const: phytec,imx27-pca100
|
||||
- const: fsl,imx27
|
||||
|
||||
- description: i.MX27 Phytec pcm970 Board
|
||||
items:
|
||||
- const: phytec,imx27-pcm970
|
||||
- const: phytec,imx27-pcm038
|
||||
- const: fsl,imx27
|
||||
|
||||
- description: i.MX28 based Boards
|
||||
items:
|
||||
- enum:
|
||||
@ -88,13 +129,33 @@ properties:
|
||||
- kobo,aura
|
||||
- const: fsl,imx50
|
||||
|
||||
- description: i.MX51 Babbage Board
|
||||
- description: i.MX51 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- armadeus,imx51-apf51 # APF51 SoM
|
||||
- armadeus,imx51-apf51dev # APF51 SoM on APF51Dev board
|
||||
- armadeus,imx51-apf51 # Armadeus Systems APF51 module
|
||||
- fsl,imx51-babbage
|
||||
- technologic,imx51-ts4800
|
||||
- zii,imx51-scu3-esb
|
||||
- zii,imx51-scu2-mezz
|
||||
- zii,imx51-rdu1
|
||||
- const: fsl,imx51
|
||||
|
||||
- description: i.MX51 based Armadeus Systems APF51Dev Board
|
||||
items:
|
||||
- const: armadeus,imx51-apf51dev
|
||||
- const: armadeus,imx51-apf51
|
||||
- const: fsl,imx51
|
||||
|
||||
- description: i.MX51 based Digi ConnectCore CC(W)-MX51 JSK Board
|
||||
items:
|
||||
- const: digi,connectcore-ccxmx51-jsk
|
||||
- const: digi,connectcore-ccxmx51-som
|
||||
- const: fsl,imx51
|
||||
|
||||
- description: i.MX51 based Eukrea CPUIMX51 Board
|
||||
items:
|
||||
- const: eukrea,mbimxsd51
|
||||
- const: eukrea,cpuimx51
|
||||
- const: fsl,imx51
|
||||
|
||||
- description: i.MX53 based Boards
|
||||
@ -104,36 +165,112 @@ properties:
|
||||
- fsl,imx53-ard
|
||||
- fsl,imx53-evk
|
||||
- fsl,imx53-qsb
|
||||
- fsl,imx53-qsrb # Freescale i.MX53 Quick Start-R Board
|
||||
- fsl,imx53-smd
|
||||
- ge,imx53-cpuvo # General Electric CS ONE
|
||||
- inversepath,imx53-usbarmory # Inverse Path USB armory
|
||||
- karo,tx53 # Ka-Ro electronics TX53 module
|
||||
- kiebackpeter,imx53-ddc # K+P imx53 DDC
|
||||
- kiebackpeter,imx53-hsc # K+P imx53 HSC
|
||||
- menlo,m53menlo
|
||||
- voipac,imx53-dmm-668 # Voipac i.MX53 X53-DMM-668
|
||||
- const: fsl,imx53
|
||||
|
||||
- description: i.MX53 based Aries/DENX M53EVK Board
|
||||
items:
|
||||
- const: aries,imx53-m53evk
|
||||
- const: denx,imx53-m53evk
|
||||
- const: fsl,imx53
|
||||
|
||||
- description: i.MX53 based TQ MBa53 Board
|
||||
items:
|
||||
- const: tq,mba53
|
||||
- const: tq,tqma53
|
||||
- const: fsl,imx53
|
||||
|
||||
- description: i.MX6Q based Boards
|
||||
items:
|
||||
- enum:
|
||||
- armadeus,imx6q-apf6 # APF6 (Quad/Dual) SoM
|
||||
- armadeus,imx6q-apf6dev # APF6 (Quad/Dual) SoM on APF6Dev board
|
||||
- auvidea,h100 # Auvidea H100
|
||||
- boundary,imx6q-nitrogen6_max
|
||||
- boundary,imx6q-nitrogen6_som2
|
||||
- boundary,imx6q-nitrogen6x
|
||||
- compulab,cm-fx6 # CompuLab CM-FX6
|
||||
- dmo,imx6q-edmqmx6 # Data Modul eDM-QMX6 Board
|
||||
- embest,imx6q-marsboard # Embest MarS Board i.MX6Dual
|
||||
- emtrion,emcon-mx6 # emCON-MX6D or emCON-MX6Q SoM
|
||||
- emtrion,emcon-mx6-avari # emCON-MX6D or emCON-MX6Q SoM on Avari Base
|
||||
- engicam,imx6-icore # Engicam i.CoreM6 Starter Kit
|
||||
- engicam,imx6-icore-rqs # Engicam i.CoreM6 RQS Starter Kit
|
||||
- fsl,imx6q-arm2
|
||||
- fsl,imx6q-sabreauto
|
||||
- fsl,imx6q-sabrelite
|
||||
- fsl,imx6q-sabresd
|
||||
- karo,imx6q-tx6q # Ka-Ro electronics TX6Q Modules
|
||||
- kiebackpeter,imx6q-tpc # K+P i.MX6 Quad TPC Board
|
||||
- kontron,imx6q-samx6i # Kontron i.MX6 Dual/Quad SMARC Module
|
||||
- kosagi,imx6q-novena # Kosagi Novena Dual/Quad
|
||||
- kvg,vicut1q # Kverneland UT1Q board
|
||||
- logicpd,imx6q-logicpd
|
||||
- lwn,display5 # Liebherr Display5 i.MX6 Quad Board
|
||||
- lwn,mccmon6 # Liebherr Monitor6 i.MX6 Quad Board
|
||||
- nutsboard,imx6q-pistachio # NutsBoard i.MX6 Quad Pistachio
|
||||
- microsys,sbc6x # MicroSys sbc6x board
|
||||
- poslab,imx6q-savageboard # Poslab SavageBoard Quad
|
||||
- prt,prti6q # Protonic PRTI6Q board
|
||||
- prt,prtwd2 # Protonic WD2 board
|
||||
- rex,imx6q-rex-pro # Rex Pro i.MX6 Quad Board
|
||||
- solidrun,cubox-i/q # SolidRun Cubox-i Dual/Quad
|
||||
- solidrun,hummingboard/q
|
||||
- solidrun,hummingboard2/q
|
||||
- tbs,imx6q-tbs2910 # TBS2910 Matrix ARM mini PC
|
||||
- technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf
|
||||
- technexion,imx6q-pico-hobbit # TechNexion i.MX6Q Pico-Hobbit
|
||||
- technexion,imx6q-pico-nymph # TechNexion i.MX6Q Pico-Nymph
|
||||
- technexion,imx6q-pico-pi # TechNexion i.MX6Q Pico-Pi
|
||||
- technologic,imx6q-ts4900
|
||||
- technologic,imx6q-ts7970
|
||||
- toradex,apalis_imx6q # Apalis iMX6 Module
|
||||
- toradex,apalis_imx6q-eval # Apalis iMX6 Module on Apalis Evaluation Board
|
||||
- toradex,apalis_imx6q-ixora # Apalis iMX6 Module on Ixora
|
||||
- toradex,apalis_imx6q-ixora-v1.1 # Apalis iMX6 Module on Ixora V1.1
|
||||
- toradex,apalis_imx6q # Apalis iMX6 Module
|
||||
- udoo,imx6q-udoo # Udoo i.MX6 Quad Board
|
||||
- uniwest,imx6q-evi # Uniwest Evi
|
||||
- variscite,dt6customboard
|
||||
- wand,imx6q-wandboard # Wandboard i.MX6 Quad Board
|
||||
- zealz,imx6q-gk802 # Zealz GK802
|
||||
- zii,imx6q-zii-rdu2 # ZII RDU2 Board
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q Advantech DMS-BA16 Boards
|
||||
items:
|
||||
- enum:
|
||||
- advantech,imx6q-dms-ba16 # Advantech DMS-BA16
|
||||
- ge,imx6q-b450v3 # General Electric B450v3
|
||||
- ge,imx6q-b650v3 # General Electric B650v3
|
||||
- ge,imx6q-b850v3 # General Electric B850v3
|
||||
- const: advantech,imx6q-ba16
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q Armadeus APF6 Boards
|
||||
items:
|
||||
- const: armadeus,imx6q-apf6dev
|
||||
- const: armadeus,imx6q-apf6
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q CompuLab Utilite Pro Board
|
||||
items:
|
||||
- const: compulab,utilite-pro
|
||||
- const: compulab,cm-fx6
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q DFI FS700-M60-6QD Board
|
||||
items:
|
||||
- const: dfi,fs700-m60-6qd
|
||||
- const: dfi,fs700e-m60
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q DHCOM Premium Developer Kit Board
|
||||
items:
|
||||
- const: dh,imx6q-dhcom-pdk2
|
||||
- const: dh,imx6q-dhcom-som
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q Gateworks Ventana Boards
|
||||
@ -172,11 +309,33 @@ properties:
|
||||
- const: phytec,imx6q-pfla02 # PHYTEC phyFLEX-i.MX6 Quad
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q Boards with Toradex Apalis iMX6Q/D Module
|
||||
items:
|
||||
- enum:
|
||||
- toradex,apalis_imx6q-ixora # Apalis iMX6Q/D Module on Ixora Carrier Board
|
||||
- toradex,apalis_imx6q-eval # Apalis iMX6Q/D Module on Apalis Evaluation Board
|
||||
- const: toradex,apalis_imx6q
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6Q Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.1
|
||||
items:
|
||||
- const: toradex,apalis_imx6q-ixora-v1.1
|
||||
- const: toradex,apalis_imx6q-ixora
|
||||
- const: toradex,apalis_imx6q
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6QP based Boards
|
||||
items:
|
||||
- enum:
|
||||
- boundary,imx6qp-nitrogen6_max
|
||||
- boundary,imx6qp-nitrogen6_som2
|
||||
- fsl,imx6qp-sabreauto # i.MX6 Quad Plus SABRE Automotive Board
|
||||
- fsl,imx6qp-sabresd # i.MX6 Quad Plus SABRE Smart Device Board
|
||||
- karo,imx6qp-tx6qp # Ka-Ro electronics TX6QP-8037 Module
|
||||
- kvg,vicutp # Kverneland UT1P board
|
||||
- prt,prtwd3 # Protonic WD3 board
|
||||
- wand,imx6qp-wandboard # Wandboard i.MX6 QuadPlus Board
|
||||
- zii,imx6qp-zii-rdu2 # ZII RDU2+ Board
|
||||
- const: fsl,imx6qp
|
||||
|
||||
- description: i.MX6QP PHYTEC phyBOARD-Mira
|
||||
@ -189,32 +348,64 @@ properties:
|
||||
- description: i.MX6DL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- armadeus,imx6dl-apf6 # APF6 (Solo) SoM
|
||||
- armadeus,imx6dl-apf6dev # APF6 (Solo) SoM on APF6Dev board
|
||||
- abb,aristainetos-imx6dl-4 # aristainetos i.MX6 Dual Lite Board 4
|
||||
- abb,aristainetos-imx6dl-7 # aristainetos i.MX6 Dual Lite Board 7
|
||||
- abb,aristainetos2-imx6dl-4 # aristainetos2 i.MX6 Dual Lite Board 4
|
||||
- abb,aristainetos2-imx6dl-7 # aristainetos2 i.MX6 Dual Lite Board 7
|
||||
- alt,alti6p # Altesco I6P Board
|
||||
- boundary,imx6dl-nit6xlite # Boundary Devices Nitrogen6 Lite
|
||||
- boundary,imx6dl-nitrogen6x # Boundary Devices Nitrogen6x
|
||||
- bticino,imx6dl-mamoj # BTicino i.MX6DL Mamoj
|
||||
- eckelmann,imx6dl-ci4x10
|
||||
- emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM
|
||||
- emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base
|
||||
- engicam,imx6-icore # Engicam i.CoreM6 Starter Kit
|
||||
- engicam,imx6-icore-rqs # Engicam i.CoreM6 RQS Starter Kit
|
||||
- fsl,imx6dl-sabreauto # i.MX6 DualLite/Solo SABRE Automotive Board
|
||||
- fsl,imx6dl-sabrelite # i.MX6 DualLite SABRE Lite Board
|
||||
- fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board
|
||||
- karo,imx6dl-tx6dl # Ka-Ro electronics TX6U Modules
|
||||
- kontron,imx6dl-samx6i # Kontron i.MX6 Solo SMARC Module
|
||||
- kvg,victgo # Kverneland TGO
|
||||
- kvg,vicut1 # Kverneland UT1 board
|
||||
- ply,plybas # Plymovent BAS board
|
||||
- ply,plym2m # Plymovent M2M board
|
||||
- poslab,imx6dl-savageboard # Poslab SavageBoard Dual
|
||||
- prt,prtmvt # Protonic MVT board
|
||||
- prt,prtrvt # Protonic RVT board
|
||||
- prt,prtvt7 # Protonic VT7 board
|
||||
- rex,imx6dl-rex-basic # Rex Basic i.MX6 Dual Lite Board
|
||||
- riot,imx6s-riotboard # RIoTboard i.MX6S
|
||||
- solidrun,cubox-i/dl # SolidRun Cubox-i Solo/DualLite
|
||||
- solidrun,hummingboard/dl
|
||||
- solidrun,hummingboard2/dl # SolidRun HummingBoard2 Solo/DualLite
|
||||
- technexion,imx6dl-pico-dwarf # TechNexion i.MX6DL Pico-Dwarf
|
||||
- technexion,imx6dl-pico-hobbit # TechNexion i.MX6DL Pico-Hobbit
|
||||
- technexion,imx6dl-pico-nymph # TechNexion i.MX6DL Pico-Nymph
|
||||
- technexion,imx6dl-pico-pi # TechNexion i.MX6DL Pico-Pi
|
||||
- technologic,imx6dl-ts4900
|
||||
- technologic,imx6dl-ts7970
|
||||
- toradex,colibri_imx6dl # Colibri iMX6 Module
|
||||
- toradex,colibri_imx6dl-v1_1 # Colibri iMX6 Module V1.1
|
||||
- toradex,colibri_imx6dl-eval-v3 # Colibri iMX6 Module on Colibri Evaluation Board V3
|
||||
- toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6 Module V1.1 on Colibri Evaluation Board V3
|
||||
- udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board
|
||||
- vdl,lanmcu # Van der Laan LANMCU board
|
||||
- wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board
|
||||
- ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board
|
||||
- ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board
|
||||
- ysoft,imx6dl-yapp4-orion # i.MX6 DualLite Y Soft IOTA Orion board
|
||||
- ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board
|
||||
- const: fsl,imx6dl
|
||||
|
||||
- description: i.MX6DL based Armadeus AFP6 Board
|
||||
items:
|
||||
- const: armadeus,imx6dl-apf6dev
|
||||
- const: armadeus,imx6dl-apf6 # APF6 (Solo) SoM
|
||||
- const: fsl,imx6dl
|
||||
|
||||
- description: i.MX6DL based DFI FS700-M60-6DL Board
|
||||
items:
|
||||
- const: dfi,fs700-m60-6dl
|
||||
- const: dfi,fs700e-m60
|
||||
- const: fsl,imx6dl
|
||||
|
||||
- description: i.MX6DL Gateworks Ventana Boards
|
||||
items:
|
||||
- enum:
|
||||
@ -250,12 +441,29 @@ properties:
|
||||
- const: phytec,imx6dl-pfla02 # PHYTEC phyFLEX-i.MX6 Quad
|
||||
- const: fsl,imx6dl
|
||||
|
||||
- description: i.MX6DL Toradex Colibri iMX6 Module on Colibri
|
||||
Evaluation Board V3
|
||||
items:
|
||||
- const: toradex,colibri_imx6dl-eval-v3
|
||||
- const: toradex,colibri_imx6dl # Colibri iMX6 Module
|
||||
- const: fsl,imx6dl
|
||||
|
||||
- description: i.MX6DL Toradex Colibri iMX6 Module V1.1 on Colibri
|
||||
Evaluation Board V3
|
||||
items:
|
||||
- const: toradex,colibri_imx6dl-v1_1-eval-v3
|
||||
- const: toradex,colibri_imx6dl-v1_1 # Colibri iMX6 Module V1.1
|
||||
- const: toradex,colibri_imx6dl-eval-v3
|
||||
- const: toradex,colibri_imx6dl # Colibri iMX6 Module
|
||||
- const: fsl,imx6dl
|
||||
|
||||
- description: i.MX6SL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6sl-evk # i.MX6 SoloLite EVK Board
|
||||
- kobo,tolino-shine2hd
|
||||
- kobo,tolino-shine3
|
||||
- revotics,imx6sl-warp # Revotics WaRP Board
|
||||
- const: fsl,imx6sl
|
||||
|
||||
- description: i.MX6SLL based Boards
|
||||
@ -268,24 +476,51 @@ properties:
|
||||
- description: i.MX6SX based Boards
|
||||
items:
|
||||
- enum:
|
||||
- boundary,imx6sx-nitrogen6sx
|
||||
- fsl,imx6sx-sabreauto # i.MX6 SoloX Sabre Auto Board
|
||||
- fsl,imx6sx-sdb # i.MX6 SoloX SDB Board
|
||||
- fsl,imx6sx-sdb-reva # i.MX6 SoloX SDB Rev-A Board
|
||||
- samtec,imx6sx-vining-2000 # Softing VIN|ING 2000 Board
|
||||
- udoo,neobasic # UDOO Neo Basic Board
|
||||
- udoo,neoextended # UDOO Neo Extended
|
||||
- udoo,neofull # UDOO Neo Full
|
||||
- const: fsl,imx6sx
|
||||
|
||||
- description: i.MX6UL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- armadeus,imx6ul-opos6ul # OPOS6UL (i.MX6UL) SoM
|
||||
- armadeus,imx6ul-opos6uldev # OPOS6UL (i.MX6UL) SoM on OPOS6ULDev board
|
||||
- engicam,imx6ul-geam # Engicam GEAM6UL Starter Kit
|
||||
- engicam,imx6ul-isiot # Engicam Is.IoT MX6UL eMMC/NAND Starter kit
|
||||
- fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board
|
||||
- karo,imx6ul-tx6ul # Ka-Ro electronics TXUL-0010 Module
|
||||
- kontron,imx6ul-n6310-som # Kontron N6310 SOM
|
||||
- kontron,imx6ul-n6311-som # Kontron N6311 SOM
|
||||
- prt,prti6g # Protonic PRTI6G Board
|
||||
- technexion,imx6ul-pico-dwarf # TechNexion i.MX6UL Pico-Dwarf
|
||||
- technexion,imx6ul-pico-hobbit # TechNexion i.MX6UL Pico-Hobbit
|
||||
- technexion,imx6ul-pico-pi # TechNexion i.MX6UL Pico-Pi
|
||||
- const: fsl,imx6ul
|
||||
|
||||
- description: i.MX6UL Armadeus Systems OPOS6UL SoM Board
|
||||
items:
|
||||
- const: armadeus,imx6ul-opos6uldev # OPOS6UL (i.MX6UL) SoM on OPOS6ULDev board
|
||||
- const: armadeus,imx6ul-opos6ul # OPOS6UL (i.MX6UL) SoM
|
||||
- const: fsl,imx6ul
|
||||
|
||||
- description: i.MX6UL Digi International ConnectCore 6UL Boards
|
||||
items:
|
||||
- enum:
|
||||
- digi,ccimx6ulsbcexpress # Digi International ConnectCore 6UL SBC Express
|
||||
- digi,ccimx6ulsbcpro # Digi International ConnectCore 6UL SBC Pro
|
||||
- const: digi,ccimx6ulsom
|
||||
- const: fsl,imx6ul
|
||||
|
||||
- description: i.MX6UL Grinn liteBoard
|
||||
items:
|
||||
- const: grinn,imx6ul-liteboard
|
||||
- const: grinn,imx6ul-litesom
|
||||
- const: fsl,imx6ul
|
||||
|
||||
- description: i.MX6UL PHYTEC phyBOARD-Segin
|
||||
items:
|
||||
- enum:
|
||||
@ -317,8 +552,6 @@ properties:
|
||||
- description: i.MX6ULL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM
|
||||
- armadeus,imx6ull-opos6uldev # OPOS6UL (i.MX6ULL) SoM on OPOS6ULDev board
|
||||
- fsl,imx6ull-14x14-evk # i.MX6 UltraLiteLite 14x14 EVK Board
|
||||
- kontron,imx6ull-n6411-som # Kontron N6411 SOM
|
||||
- myir,imx6ull-mys-6ulx-eval # MYiR Tech iMX6ULL Evaluation Board
|
||||
@ -326,6 +559,12 @@ properties:
|
||||
- toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / BT Module on Colibri Eval Board
|
||||
- const: fsl,imx6ull
|
||||
|
||||
- description: i.MX6ULL Armadeus Systems OPOS6ULDev Board
|
||||
items:
|
||||
- const: armadeus,imx6ull-opos6uldev # OPOS6UL (i.MX6ULL) SoM on OPOS6ULDev board
|
||||
- const: armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM
|
||||
- const: fsl,imx6ull
|
||||
|
||||
- description: i.MX6ULL PHYTEC phyBOARD-Segin
|
||||
items:
|
||||
- enum:
|
||||
@ -351,17 +590,32 @@ properties:
|
||||
- description: i.MX7S based Boards
|
||||
items:
|
||||
- enum:
|
||||
- toradex,colibri-imx7s # Colibri iMX7 Solo Module
|
||||
- toradex,colibri-imx7s-aster # Colibri iMX7 Solo Module on Aster Carrier Board
|
||||
- toradex,colibri-imx7s-eval-v3 # Colibri iMX7 Solo Module on Colibri Evaluation Board V3
|
||||
- tq,imx7s-mba7 # i.MX7S TQ MBa7 with TQMa7S SoM
|
||||
- element14,imx7s-warp # Element14 Warp i.MX7 Board
|
||||
- const: fsl,imx7s
|
||||
|
||||
- description: i.MX7S Boards with Toradex Colibri iMX7S Module
|
||||
items:
|
||||
- enum:
|
||||
- toradex,colibri-imx7s-aster # Module on Aster Carrier Board
|
||||
- toradex,colibri-imx7s-eval-v3 # Module on Colibri Evaluation Board V3
|
||||
- const: toradex,colibri-imx7s
|
||||
- const: fsl,imx7s
|
||||
|
||||
- description: TQ-Systems TQMa7S SoM on MBa7x board
|
||||
items:
|
||||
- const: tq,imx7s-mba7
|
||||
- const: tq,imx7s-tqma7
|
||||
- const: fsl,imx7s
|
||||
|
||||
- description: i.MX7D based Boards
|
||||
items:
|
||||
- enum:
|
||||
- boundary,imx7d-nitrogen7
|
||||
- compulab,cl-som-imx7 # CompuLab CL-SOM-iMX7
|
||||
- fsl,imx7d-sdb # i.MX7 SabreSD Board
|
||||
- fsl,imx7d-sdb-reva # i.MX7 SabreSD Rev-A Board
|
||||
- kam,imx7d-flex-concentrator # Kamstrup OMNIA Flex Concentrator
|
||||
- kam,imx7d-flex-concentrator-mfg # Kamstrup OMNIA Flex Concentrator in manufacturing mode
|
||||
- novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board
|
||||
- technexion,imx7d-pico-dwarf # TechNexion i.MX7D Pico-Dwarf
|
||||
- technexion,imx7d-pico-hobbit # TechNexion i.MX7D Pico-Hobbit
|
||||
@ -376,11 +630,16 @@ properties:
|
||||
# Colibri Evaluation Board V3
|
||||
- toradex,colibri-imx7d-eval-v3 # Colibri iMX7 Dual Module on
|
||||
# Colibri Evaluation Board V3
|
||||
- tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM
|
||||
- zii,imx7d-rmu2 # ZII RMU2 Board
|
||||
- zii,imx7d-rpu2 # ZII RPU2 Board
|
||||
- const: fsl,imx7d
|
||||
|
||||
- description: TQ-Systems TQMa7D SoM on MBa7x board
|
||||
items:
|
||||
- const: tq,imx7d-mba7
|
||||
- const: tq,imx7d-tqma7
|
||||
- const: fsl,imx7d
|
||||
|
||||
- description:
|
||||
Compulab SBC-iMX7 is a single board computer based on the
|
||||
Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
|
||||
@ -392,6 +651,22 @@ properties:
|
||||
- const: compulab,cl-som-imx7
|
||||
- const: fsl,imx7d
|
||||
|
||||
- description: i.MX7D Boards with Toradex Colibri i.MX7D Module
|
||||
items:
|
||||
- enum:
|
||||
- toradex,colibri-imx7d-aster # Module on Aster Carrier Board
|
||||
- toradex,colibri-imx7d-eval-v3 # Module on Colibri Evaluation Board V3
|
||||
- const: toradex,colibri-imx7d
|
||||
- const: fsl,imx7d
|
||||
|
||||
- description: i.MX7D Boards with Toradex Colibri i.MX7D eMMC Module
|
||||
items:
|
||||
- enum:
|
||||
- toradex,colibri-imx7d-emmc-aster # Module on Aster Carrier Board
|
||||
- toradex,colibri-imx7d-emmc-eval-v3 # Module on Colibri Evaluation Board V3
|
||||
- const: toradex,colibri-imx7d-emmc
|
||||
- const: fsl,imx7d
|
||||
|
||||
- description: i.MX7ULP based Boards
|
||||
items:
|
||||
- enum:
|
||||
@ -403,11 +678,22 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
|
||||
- boundary,imx8mm-nitrogen8mm # i.MX8MM Nitrogen Board
|
||||
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
|
||||
- fsl,imx8mm-evk # i.MX8MM EVK Board
|
||||
- gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit
|
||||
- gw,imx8mm-gw72xx-0x # i.MX8MM Gateworks Development Kit
|
||||
- gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit
|
||||
- kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM
|
||||
- variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module
|
||||
- const: fsl,imx8mm
|
||||
|
||||
- description: Kontron BL i.MX8MM (N801X S) Board
|
||||
items:
|
||||
- const: kontron,imx8mm-n801x-s
|
||||
- const: kontron,imx8mm-n801x-som
|
||||
- const: fsl,imx8mm
|
||||
|
||||
- description: Variscite VAR-SOM-MX8MM based boards
|
||||
items:
|
||||
- const: variscite,var-som-mx8mm-symphony
|
||||
@ -417,6 +703,7 @@ properties:
|
||||
- description: i.MX8MN based Boards
|
||||
items:
|
||||
- enum:
|
||||
- beacon,imx8mn-beacon-kit # i.MX8MN Beacon Development Kit
|
||||
- fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board
|
||||
- fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board
|
||||
- const: fsl,imx8mn
|
||||
@ -433,6 +720,12 @@ properties:
|
||||
- fsl,imx8mp-evk # i.MX8MP EVK Board
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: PHYTEC phyCORE-i.MX8MP SoM based boards
|
||||
items:
|
||||
- const: phytec,imx8mp-phyboard-pollux-rdk # phyBOARD-Pollux RDK
|
||||
- const: phytec,imx8mp-phycore-som # phyCORE-i.MX8MP SoM
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: i.MX8MQ based Boards
|
||||
items:
|
||||
- enum:
|
||||
@ -450,6 +743,7 @@ properties:
|
||||
- enum:
|
||||
- purism,librem5r2 # Purism Librem5 phone "Chestnut"
|
||||
- purism,librem5r3 # Purism Librem5 phone "Dogwood"
|
||||
- purism,librem5r4 # Purism Librem5 phone "Evergreen"
|
||||
- const: purism,librem5
|
||||
- const: fsl,imx8mq
|
||||
|
||||
@ -491,10 +785,26 @@ properties:
|
||||
- fsl,vf600
|
||||
- fsl,vf610
|
||||
- fsl,vf610m4
|
||||
- toradex,vf500-colibri_vf50 # Colibri VF50 Module
|
||||
- toradex,vf500-colibri_vf50-on-eval # Colibri VF50 Module on Colibri Evaluation Board
|
||||
- toradex,vf610-colibri_vf61 # Colibri VF61 Module
|
||||
- toradex,vf610-colibri_vf61-on-eval # Colibri VF61 Module on Colibri Evaluation Board
|
||||
|
||||
- description: Toradex Colibri VF50 Module on Colibri Evaluation Board
|
||||
items:
|
||||
- const: toradex,vf500-colibri_vf50-on-eval
|
||||
- const: toradex,vf500-colibri_vf50
|
||||
- const: fsl,vf500
|
||||
|
||||
- description: VF610 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- lwn,bk4 # Liebherr BK4 controller
|
||||
- phytec,vf610-cosmic # PHYTEC Cosmic/Cosmic+ Board
|
||||
- fsl,vf610-twr # VF610 Tower Board
|
||||
- const: fsl,vf610
|
||||
|
||||
- description: Toradex Colibri VF61 Module on Colibri Evaluation Board
|
||||
items:
|
||||
- const: toradex,vf610-colibri_vf61-on-eval
|
||||
- const: toradex,vf610-colibri_vf61
|
||||
- const: fsl,vf610
|
||||
|
||||
- description: ZII's VF610 based Boards
|
||||
items:
|
||||
@ -515,6 +825,7 @@ properties:
|
||||
- ebs-systart,oxalis
|
||||
- fsl,ls1012a-rdb
|
||||
- fsl,ls1012a-frdm
|
||||
- fsl,ls1012a-frwy
|
||||
- fsl,ls1012a-qds
|
||||
- const: fsl,ls1012a
|
||||
|
||||
@ -543,10 +854,12 @@ properties:
|
||||
Kontron SMARC-sAL28 board on the SMARC Eval Carrier 2.0
|
||||
items:
|
||||
- enum:
|
||||
- kontron,sl28-var1-ads2
|
||||
- kontron,sl28-var2-ads2
|
||||
- kontron,sl28-var3-ads2
|
||||
- kontron,sl28-var4-ads2
|
||||
- enum:
|
||||
- kontron,sl28-var1
|
||||
- kontron,sl28-var2
|
||||
- kontron,sl28-var3
|
||||
- kontron,sl28-var4
|
||||
@ -557,6 +870,7 @@ properties:
|
||||
Kontron SMARC-sAL28 board (on a generic/undefined carrier)
|
||||
items:
|
||||
- enum:
|
||||
- kontron,sl28-var1
|
||||
- kontron,sl28-var2
|
||||
- kontron,sl28-var3
|
||||
- kontron,sl28-var4
|
||||
@ -613,6 +927,15 @@ properties:
|
||||
- enum:
|
||||
- fsl,lx2160a-qds
|
||||
- fsl,lx2160a-rdb
|
||||
- fsl,lx2162a-qds
|
||||
- const: fsl,lx2160a
|
||||
|
||||
- description: SolidRun LX2160A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- solidrun,clearfog-cx
|
||||
- solidrun,honeycomb
|
||||
- const: solidrun,lx2160a-cex7
|
||||
- const: fsl,lx2160a
|
||||
|
||||
- description: S32V234 based Boards
|
||||
|
||||
@ -313,7 +313,7 @@ patternProperties:
|
||||
wakeup-latency-us by this duration.
|
||||
|
||||
idle-state-name:
|
||||
$ref: /schemas/types.yaml#definitions/string
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description:
|
||||
A string used as a descriptive name for the idle state.
|
||||
|
||||
|
||||
@ -80,6 +80,11 @@ Required properties:
|
||||
|
||||
- offset: offset address inside the syscon block
|
||||
|
||||
Optional properties:
|
||||
|
||||
- marvell,pwm-offset: offset address of PWM duration control registers inside
|
||||
the syscon block
|
||||
|
||||
Example:
|
||||
ap_syscon: system-controller@6f4000 {
|
||||
compatible = "syscon", "simple-mfd";
|
||||
@ -101,6 +106,9 @@ ap_syscon: system-controller@6f4000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&ap_pinctrl 0 0 19>;
|
||||
marvell,pwm-offset = <0x10c0>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&ap_clk 3>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -84,6 +84,10 @@ properties:
|
||||
- enum:
|
||||
- mediatek,mt8135-evbp1
|
||||
- const: mediatek,mt8135
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8167-pumpkin
|
||||
- const: mediatek,mt8167
|
||||
- description: Google Elm (Acer Chromebook R13)
|
||||
items:
|
||||
- const: google,elm-rev8
|
||||
@ -116,7 +120,9 @@ properties:
|
||||
- const: mediatek,mt8183
|
||||
- description: Google Krane (Lenovo IdeaPad Duet, 10e,...)
|
||||
items:
|
||||
- const: google,krane-sku176
|
||||
- enum:
|
||||
- google,krane-sku0
|
||||
- google,krane-sku176
|
||||
- const: google,krane
|
||||
- const: mediatek,mt8183
|
||||
|
||||
|
||||
@ -23,6 +23,8 @@ properties:
|
||||
enum:
|
||||
- qcom,sc7180-llcc
|
||||
- qcom,sdm845-llcc
|
||||
- qcom,sm8150-llcc
|
||||
- qcom,sm8250-llcc
|
||||
|
||||
reg:
|
||||
items:
|
||||
|
||||
@ -0,0 +1,40 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2020 thingy.jp.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: MStar/SigmaStar Armv7 SoC SMP control registers
|
||||
|
||||
maintainers:
|
||||
- Daniel Palmer <daniel@thingy.jp>
|
||||
|
||||
description: |
|
||||
MStar/SigmaStar's Armv7 SoCs that have more than one processor
|
||||
have a region of registers that allow setting the boot address
|
||||
and a magic number that allows secondary processors to leave
|
||||
the loop they are parked in by the boot ROM.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- sstar,ssd201-smpctrl # SSD201/SSD202D
|
||||
- const: mstar,smpctrl
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
smpctrl@204000 {
|
||||
compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl";
|
||||
reg = <0x204000 0x200>;
|
||||
};
|
||||
@ -20,6 +20,12 @@ properties:
|
||||
- thingyjp,breadbee-crust # thingy.jp BreadBee Crust
|
||||
- const: mstar,infinity
|
||||
|
||||
- description: infinity2m boards
|
||||
items:
|
||||
- enum:
|
||||
- honestar,ssd201htv2 # Honestar SSD201_HT_V2 devkit
|
||||
- const: mstar,infinity2m
|
||||
|
||||
- description: infinity3 boards
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@ -43,6 +43,7 @@ properties:
|
||||
- arm,cortex-a75-pmu
|
||||
- arm,cortex-a76-pmu
|
||||
- arm,cortex-a77-pmu
|
||||
- arm,cortex-a78-pmu
|
||||
- arm,neoverse-e1-pmu
|
||||
- arm,neoverse-n1-pmu
|
||||
- brcm,vulcan-pmu
|
||||
|
||||
@ -40,7 +40,9 @@ description: |
|
||||
sdm630
|
||||
sdm660
|
||||
sdm845
|
||||
sdx55
|
||||
sm8250
|
||||
sm8350
|
||||
|
||||
The 'board' element must be one of the following strings:
|
||||
|
||||
@ -167,6 +169,11 @@ properties:
|
||||
- xiaomi,lavender
|
||||
- const: qcom,sdm660
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sdx55-mtp
|
||||
- const: qcom,sdx55
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,ipq6018-cp01-c1
|
||||
@ -178,6 +185,11 @@ properties:
|
||||
- qcom,sm8250-mtp
|
||||
- const: qcom,sm8250
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sm8350-mtp
|
||||
- const: qcom,sm8350
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
||||
@ -130,6 +130,7 @@ properties:
|
||||
- description: RZ/G2N (R8A774B1)
|
||||
items:
|
||||
- enum:
|
||||
- beacon,beacon-rzg2n # Beacon EmbeddedWorks RZ/G2N Kit
|
||||
- hoperun,hihope-rzg2n # HopeRun HiHope RZ/G2N platform
|
||||
- const: renesas,r8a774b1
|
||||
|
||||
@ -154,6 +155,7 @@ properties:
|
||||
- description: RZ/G2H (R8A774E1)
|
||||
items:
|
||||
- enum:
|
||||
- beacon,beacon-rzg2h # Beacon EmbeddedWorks RZ/G2H Kit
|
||||
- hoperun,hihope-rzg2h # HopeRun HiHope RZ/G2H platform
|
||||
- const: renesas,r8a774e1
|
||||
|
||||
@ -245,6 +247,7 @@ properties:
|
||||
- enum:
|
||||
- renesas,r8a7795
|
||||
- renesas,r8a7796
|
||||
- renesas,r8a77961
|
||||
- renesas,r8a77965
|
||||
|
||||
- description: R-Car M3-N (R8A77965)
|
||||
|
||||
@ -70,6 +70,24 @@ properties:
|
||||
- const: elgin,rv1108-r1
|
||||
- const: rockchip,rv1108
|
||||
|
||||
- description: Engicam PX30.Core C.TOUCH 2.0
|
||||
items:
|
||||
- const: engicam,px30-core-ctouch2
|
||||
- const: engicam,px30-core
|
||||
- const: rockchip,px30
|
||||
|
||||
- description: Engicam PX30.Core C.TOUCH 2.0 10.1" Open Frame
|
||||
items:
|
||||
- const: engicam,px30-core-ctouch2-of10
|
||||
- const: engicam,px30-core
|
||||
- const: rockchip,px30
|
||||
|
||||
- description: Engicam PX30.Core EDIMM2.2 Starter Kit
|
||||
items:
|
||||
- const: engicam,px30-core-edimm2.2
|
||||
- const: engicam,px30-core
|
||||
- const: rockchip,px30
|
||||
|
||||
- description: Firefly Firefly-RK3288
|
||||
items:
|
||||
- enum:
|
||||
@ -114,6 +132,7 @@ properties:
|
||||
- enum:
|
||||
- friendlyarm,nanopc-t4
|
||||
- friendlyarm,nanopi-m4
|
||||
- friendlyarm,nanopi-m4b
|
||||
- friendlyarm,nanopi-neo4
|
||||
- const: rockchip,rk3399
|
||||
|
||||
@ -381,6 +400,11 @@ properties:
|
||||
- khadas,edge-v
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Kobol Helios64
|
||||
items:
|
||||
- const: kobol,helios64
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Mecer Xtreme Mini S6
|
||||
items:
|
||||
- const: mecer,xms6
|
||||
@ -444,6 +468,11 @@ properties:
|
||||
- const: radxa,rockpi4
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Radxa ROCK Pi E
|
||||
items:
|
||||
- const: radxa,rockpi-e
|
||||
- const: rockchip,rk3328
|
||||
|
||||
- description: Radxa ROCK Pi N8
|
||||
items:
|
||||
- const: radxa,rockpi-n8
|
||||
|
||||
@ -14,6 +14,19 @@ properties:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: S3C2416 based boards
|
||||
items:
|
||||
- enum:
|
||||
- samsung,smdk2416 # Samsung SMDK2416
|
||||
- const: samsung,s3c2416
|
||||
|
||||
- description: S3C6410 based boards
|
||||
items:
|
||||
- enum:
|
||||
- friendlyarm,mini6410 # FriendlyARM Mini6410
|
||||
- samsung,smdk6410 # Samsung SMDK6410
|
||||
- const: samsung,s3c6410
|
||||
|
||||
- description: S5PV210 based boards
|
||||
items:
|
||||
- enum:
|
||||
@ -83,6 +96,14 @@ properties:
|
||||
- const: samsung,exynos4412
|
||||
- const: samsung,exynos4
|
||||
|
||||
- description: Samsung p4note family boards
|
||||
items:
|
||||
- enum:
|
||||
- samsung,n8010 # Samsung GT-N8010/GT-N8013
|
||||
- const: samsung,p4note
|
||||
- const: samsung,exynos4412
|
||||
- const: samsung,exynos4
|
||||
|
||||
- description: Exynos5250 based boards
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@ -30,8 +30,8 @@ properties:
|
||||
Interrupts can be used to notify the completion of cache operations.
|
||||
The number of interrupts should match to the number of CPU cores.
|
||||
The specified interrupts correspond to CPU0, CPU1, ... in this order.
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
cache-unified: true
|
||||
|
||||
|
||||
@ -19,7 +19,12 @@ properties:
|
||||
- st,stm32mp151-pwr-mcu
|
||||
- st,stm32-syscfg
|
||||
- st,stm32-power-config
|
||||
- st,stm32-tamp
|
||||
- const: syscon
|
||||
- items:
|
||||
- const: st,stm32-tamp
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -14,6 +14,20 @@ properties:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: DH STM32MP1 SoM based Boards
|
||||
items:
|
||||
- enum:
|
||||
- arrow,stm32mp157a-avenger96 # Avenger96
|
||||
- dh,stm32mp153c-dhcom-drc02
|
||||
- dh,stm32mp157c-dhcom-pdk2
|
||||
- dh,stm32mp157c-dhcom-picoitx
|
||||
- enum:
|
||||
- dh,stm32mp153c-dhcom-som
|
||||
- dh,stm32mp157a-dhcor-som
|
||||
- dh,stm32mp157c-dhcom-som
|
||||
- enum:
|
||||
- st,stm32mp153
|
||||
- st,stm32mp157
|
||||
- items:
|
||||
- enum:
|
||||
- st,stm32f429i-disco
|
||||
@ -39,8 +53,6 @@ properties:
|
||||
- const: st,stm32h743
|
||||
- items:
|
||||
- enum:
|
||||
- arrow,stm32mp157a-avenger96 # Avenger96
|
||||
- lxa,stm32mp157c-mc1
|
||||
- shiratech,stm32mp157a-iot-box # IoT Box
|
||||
- shiratech,stm32mp157a-stinger96 # Stinger96
|
||||
- st,stm32mp157c-ed1
|
||||
@ -52,6 +64,13 @@ properties:
|
||||
- const: st,stm32mp157c-ev1
|
||||
- const: st,stm32mp157c-ed1
|
||||
- const: st,stm32mp157
|
||||
- description: Octavo OSD32MP15x System-in-Package based boards
|
||||
items:
|
||||
- enum:
|
||||
- lxa,stm32mp157c-mc1 # Linux Automation MC-1
|
||||
- const: oct,stm32mp15xx-osd32
|
||||
- enum:
|
||||
- st,stm32mp157
|
||||
- description: Odyssey STM32MP1 SoM based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@ -201,6 +201,19 @@ properties:
|
||||
- const: dserve,dsrv9703c
|
||||
- const: allwinner,sun4i-a10
|
||||
|
||||
- description: Elimo Engineering Impetus SoM
|
||||
items:
|
||||
- const: elimo,impetus
|
||||
- const: sochip,s3
|
||||
- const: allwinner,sun8i-v3
|
||||
|
||||
- description: Elimo Engineering Initium
|
||||
items:
|
||||
- const: elimo,initium
|
||||
- const: elimo,impetus
|
||||
- const: sochip,s3
|
||||
- const: allwinner,sun8i-v3
|
||||
|
||||
- description: Empire Electronix D709 Tablet
|
||||
items:
|
||||
- const: empire-electronix,d709
|
||||
@ -251,6 +264,16 @@ properties:
|
||||
- const: friendlyarm,nanopi-neo-plus2
|
||||
- const: allwinner,sun50i-h5
|
||||
|
||||
- description: FriendlyARM NanoPi R1
|
||||
items:
|
||||
- const: friendlyarm,nanopi-r1
|
||||
- const: allwinner,sun8i-h3
|
||||
|
||||
- description: FriendlyARM ZeroPi
|
||||
items:
|
||||
- const: friendlyarm,zeropi
|
||||
- const: allwinner,sun8i-h3
|
||||
|
||||
- description: Gemei G9 Tablet
|
||||
items:
|
||||
- const: gemei,g9
|
||||
@ -634,7 +657,8 @@ properties:
|
||||
- description: Pine64 PineCube
|
||||
items:
|
||||
- const: pine64,pinecube
|
||||
- const: allwinner,sun8i-s3
|
||||
- const: sochip,s3
|
||||
- const: allwinner,sun8i-v3
|
||||
|
||||
- description: Pine64 PineH64 model A
|
||||
items:
|
||||
@ -660,23 +684,31 @@ properties:
|
||||
- description: Pine64 PinePhone Developer Batch (1.0)
|
||||
items:
|
||||
- const: pine64,pinephone-1.0
|
||||
- const: pine64,pinephone
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PinePhone Braveheart (1.1)
|
||||
items:
|
||||
- const: pine64,pinephone-1.1
|
||||
- const: pine64,pinephone
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PinePhone (1.2)
|
||||
items:
|
||||
- const: pine64,pinephone-1.2
|
||||
- const: pine64,pinephone
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PineTab
|
||||
- description: Pine64 PineTab, Development Sample
|
||||
items:
|
||||
- const: pine64,pinetab
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PineTab, Early Adopter's batch (and maybe later ones)
|
||||
items:
|
||||
- const: pine64,pinetab-early-adopter
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 SoPine Baseboard
|
||||
items:
|
||||
- const: pine64,sopine-baseboard
|
||||
@ -754,6 +786,12 @@ properties:
|
||||
- const: sinlinx,sina33
|
||||
- const: allwinner,sun8i-a33
|
||||
|
||||
- description: SL631 Action Camera with IMX179
|
||||
items:
|
||||
- const: allwinner,sl631-imx179
|
||||
- const: allwinner,sl631
|
||||
- const: allwinner,sun8i-v3
|
||||
|
||||
- description: Tanix TX6
|
||||
items:
|
||||
- const: oranth,tanix-tx6
|
||||
|
||||
@ -71,6 +71,9 @@ properties:
|
||||
- const: asus,tilapia
|
||||
- const: asus,grouper
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: ouya,ouya
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,dalmore
|
||||
@ -117,10 +120,18 @@ properties:
|
||||
items:
|
||||
- const: nvidia,p3668-0000
|
||||
- const: nvidia,tegra194
|
||||
- description: Jetson Xavier NX (eMMC)
|
||||
items:
|
||||
- const: nvidia,p3668-0001
|
||||
- const: nvidia,tegra194
|
||||
- description: Jetson Xavier NX Developer Kit
|
||||
items:
|
||||
- const: nvidia,p3509-0000+p3668-0000
|
||||
- const: nvidia,tegra194
|
||||
- description: Jetson Xavier NX Developer Kit (eMMC)
|
||||
items:
|
||||
- const: nvidia,p3509-0000+p3668-0001
|
||||
- const: nvidia,tegra194
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,tegra234-vdk
|
||||
|
||||
@ -18,8 +18,30 @@ clock-names. See ../../clock/clock-bindings.txt for details.
|
||||
../../reset/reset.txt for details.
|
||||
- reset-names: Must include the following entries:
|
||||
- actmon
|
||||
- operating-points-v2: See ../bindings/opp/opp.txt for details.
|
||||
- interconnects: Should contain entries for memory clients sitting on
|
||||
MC->EMC memory interconnect path.
|
||||
- interconnect-names: Should include name of the interconnect path for each
|
||||
interconnect entry. Consult TRM documentation for
|
||||
information about available memory clients, see MEMORY
|
||||
CONTROLLER section.
|
||||
|
||||
For each opp entry in 'operating-points-v2' table:
|
||||
- opp-supported-hw: bitfield indicating SoC speedo ID mask
|
||||
- opp-peak-kBps: peak bandwidth of the memory channel
|
||||
|
||||
Example:
|
||||
dfs_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp@12750000 {
|
||||
opp-hz = /bits/ 64 <12750000>;
|
||||
opp-supported-hw = <0x000F>;
|
||||
opp-peak-kBps = <51000>;
|
||||
};
|
||||
...
|
||||
};
|
||||
|
||||
actmon@6000c800 {
|
||||
compatible = "nvidia,tegra124-actmon";
|
||||
reg = <0x0 0x6000c800 0x0 0x400>;
|
||||
@ -29,4 +51,7 @@ Example:
|
||||
clock-names = "actmon", "emc";
|
||||
resets = <&tegra_car 119>;
|
||||
reset-names = "actmon";
|
||||
operating-points-v2 = <&dfs_opp_table>;
|
||||
interconnects = <&mc TEGRA124_MC_MPCORER &emc>;
|
||||
interconnect-names = "cpu";
|
||||
};
|
||||
|
||||
@ -21,6 +21,5 @@ properties:
|
||||
- wm,wm8650
|
||||
- wm,wm8750
|
||||
- wm,wm8850
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
@ -22,6 +22,9 @@ properties:
|
||||
- adapteva,parallella
|
||||
- digilent,zynq-zybo
|
||||
- digilent,zynq-zybo-z7
|
||||
- ebang,ebaz4205
|
||||
- myir,zynq-zturn-v5
|
||||
- myir,zynq-zturn
|
||||
- xlnx,zynq-cc108
|
||||
- xlnx,zynq-zc702
|
||||
- xlnx,zynq-zc706
|
||||
@ -91,6 +94,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu104-revA
|
||||
- xlnx,zynqmp-zcu104-revC
|
||||
- xlnx,zynqmp-zcu104-rev1.0
|
||||
- const: xlnx,zynqmp-zcu104
|
||||
- const: xlnx,zynqmp
|
||||
@ -107,7 +111,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu111-revA
|
||||
- xlnx,zynqmp-zcu11-rev1.0
|
||||
- xlnx,zynqmp-zcu111-rev1.0
|
||||
- const: xlnx,zynqmp-zcu111
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
|
||||
@ -61,6 +61,7 @@ properties:
|
||||
maxItems: 8
|
||||
|
||||
calxeda,sgpio-gpio:
|
||||
maxItems: 3
|
||||
description: |
|
||||
phandle-gpio bank, bit offset, and default on or off, which indicates
|
||||
that the driver supports SGPIO indicator lights using the indicated
|
||||
|
||||
@ -0,0 +1,77 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/auxdisplay/holtek,ht16k33.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Holtek HT16K33 RAM mapping 16*8 LED controller with keyscan
|
||||
|
||||
maintainers:
|
||||
- Robin van der Gracht <robin@protonic.nl>
|
||||
|
||||
allOf:
|
||||
- $ref: "/schemas/input/matrix-keymap.yaml#"
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: holtek,ht16k33
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
refresh-rate-hz:
|
||||
maxItems: 1
|
||||
description: Display update interval in Hertz
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
debounce-delay-ms:
|
||||
maxItems: 1
|
||||
description: Debouncing interval time in milliseconds
|
||||
|
||||
linux,keymap: true
|
||||
|
||||
linux,no-autorepeat:
|
||||
description: Disable keyrepeat
|
||||
|
||||
default-brightness-level:
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
default: 16
|
||||
description: Initial brightness level
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- refresh-rate-hz
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
i2c1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ht16k33: ht16k33@70 {
|
||||
compatible = "holtek,ht16k33";
|
||||
reg = <0x70>;
|
||||
refresh-rate-hz = <20>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <5 (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)>;
|
||||
debounce-delay-ms = <50>;
|
||||
linux,keymap = <MATRIX_KEY(2, 0, KEY_F6)>,
|
||||
<MATRIX_KEY(3, 0, KEY_F8)>,
|
||||
<MATRIX_KEY(4, 0, KEY_F10)>,
|
||||
<MATRIX_KEY(5, 0, KEY_F4)>,
|
||||
<MATRIX_KEY(6, 0, KEY_F2)>,
|
||||
<MATRIX_KEY(2, 1, KEY_F5)>,
|
||||
<MATRIX_KEY(3, 1, KEY_F7)>,
|
||||
<MATRIX_KEY(4, 1, KEY_F9)>,
|
||||
<MATRIX_KEY(5, 1, KEY_F3)>,
|
||||
<MATRIX_KEY(6, 1, KEY_F1)>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/auxdisplay/modtronix,lcd2s.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Modtronix engineering LCD2S Character LCD Display
|
||||
|
||||
maintainers:
|
||||
- Lars Poeschel <poeschel@lemonage.de>
|
||||
|
||||
description:
|
||||
The LCD2S is a Character LCD Display manufactured by Modtronix Engineering.
|
||||
The display supports a serial I2C and SPI interface. The driver currently
|
||||
only supports the I2C interface.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: modtronix,lcd2s
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description:
|
||||
I2C bus address of the display.
|
||||
|
||||
display-height-chars:
|
||||
description: Height of the display, in character cells.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 4
|
||||
|
||||
display-width-chars:
|
||||
description: Width of the display, in character cells.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 16
|
||||
maximum: 20
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- display-height-chars
|
||||
- display-width-chars
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lcd2s: auxdisplay@28 {
|
||||
compatible = "modtronix,lcd2s";
|
||||
reg = <0x28>;
|
||||
display-height-chars = <4>;
|
||||
display-width-chars = <20>;
|
||||
};
|
||||
};
|
||||
@ -34,7 +34,7 @@ properties:
|
||||
description:
|
||||
The SRAM that needs to be claimed to access the display engine
|
||||
bus.
|
||||
$ref: /schemas/types.yaml#definitions/phandle-array
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
maxItems: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
@ -21,7 +21,9 @@ properties:
|
||||
oneOf:
|
||||
- const: allwinner,sun8i-a23-rsb
|
||||
- items:
|
||||
- const: allwinner,sun8i-a83t-rsb
|
||||
- enum:
|
||||
- allwinner,sun8i-a83t-rsb
|
||||
- allwinner,sun50i-h616-rsb
|
||||
- const: allwinner,sun8i-a23-rsb
|
||||
|
||||
reg:
|
||||
|
||||
@ -46,7 +46,7 @@ properties:
|
||||
const: 1
|
||||
|
||||
syscon:
|
||||
$ref: /schemas/types.yaml#definitions/phandle
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: Phandle to the Baikal-T1 System Controller DT node
|
||||
|
||||
interrupts:
|
||||
|
||||
@ -0,0 +1,82 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra ACONNECT Bus
|
||||
|
||||
description: |
|
||||
The Tegra ACONNECT bus is an AXI switch which is used to connnect various
|
||||
components inside the Audio Processing Engine (APE). All CPU accesses to
|
||||
the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
|
||||
devices accessed via the ACONNNECT are described by child-nodes.
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: nvidia,tegra210-aconnect
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,tegra186-aconnect
|
||||
- nvidia,tegra194-aconnect
|
||||
- const: nvidia,tegra210-aconnect
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Must contain the entry for APE clock
|
||||
- description: Must contain the entry for APE interface clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ape
|
||||
- const: apb2ape
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
patternProperties:
|
||||
"@[0-9a-f]+$":
|
||||
type: object
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include<dt-bindings/clock/tegra210-car.h>
|
||||
|
||||
aconnect@702c0000 {
|
||||
compatible = "nvidia,tegra210-aconnect";
|
||||
clocks = <&tegra_car TEGRA210_CLK_APE>,
|
||||
<&tegra_car TEGRA210_CLK_APB2APE>;
|
||||
clock-names = "ape", "apb2ape";
|
||||
power-domains = <&pd_audio>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x702c0000 0x702c0000 0x00040000>;
|
||||
|
||||
// Child device nodes follow ...
|
||||
};
|
||||
|
||||
...
|
||||
54
sys/contrib/device-tree/Bindings/clock/adi,axi-clkgen.yaml
Normal file
54
sys/contrib/device-tree/Bindings/clock/adi,axi-clkgen.yaml
Normal file
@ -0,0 +1,54 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/adi,axi-clkgen.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Binding for Analog Devices AXI clkgen pcore clock generator
|
||||
|
||||
maintainers:
|
||||
- Lars-Peter Clausen <lars@metafoo.de>
|
||||
- Michael Hennerich <michael.hennerich@analog.com>
|
||||
|
||||
description: |
|
||||
The axi_clkgen IP core is a software programmable clock generator,
|
||||
that can be synthesized on various FPGA platforms.
|
||||
|
||||
Link: https://wiki.analog.com/resources/fpga/docs/axi_clkgen
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,axi-clkgen-2.00.a
|
||||
- adi,zynqmp-axi-clkgen-2.00.a
|
||||
|
||||
clocks:
|
||||
description:
|
||||
Specifies the reference clock(s) from which the output frequency is
|
||||
derived. This must either reference one clock if only the first clock
|
||||
input is connected or two if both clock inputs are connected.
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@ff000000 {
|
||||
compatible = "adi,axi-clkgen-2.00.a";
|
||||
#clock-cells = <0>;
|
||||
reg = <0xff000000 0x1000>;
|
||||
clocks = <&osc 1>;
|
||||
};
|
||||
@ -41,6 +41,8 @@ properties:
|
||||
- allwinner,sun50i-h5-ccu
|
||||
- allwinner,sun50i-h6-ccu
|
||||
- allwinner,sun50i-h6-r-ccu
|
||||
- allwinner,sun50i-h616-ccu
|
||||
- allwinner,sun50i-h616-r-ccu
|
||||
- allwinner,suniv-f1c100s-ccu
|
||||
- nextthing,gr8-ccu
|
||||
|
||||
@ -82,6 +84,7 @@ if:
|
||||
- allwinner,sun50i-a64-r-ccu
|
||||
- allwinner,sun50i-a100-r-ccu
|
||||
- allwinner,sun50i-h6-r-ccu
|
||||
- allwinner,sun50i-h616-r-ccu
|
||||
|
||||
then:
|
||||
properties:
|
||||
@ -100,6 +103,7 @@ else:
|
||||
enum:
|
||||
- allwinner,sun50i-a100-ccu
|
||||
- allwinner,sun50i-h6-ccu
|
||||
- allwinner,sun50i-h616-ccu
|
||||
|
||||
then:
|
||||
properties:
|
||||
|
||||
@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Allwinner A80 USB Clock Controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
properties:
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
"#reset-cells":
|
||||
const: 1
|
||||
|
||||
compatible:
|
||||
const: allwinner,sun9i-a80-usb-clks
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: High Frequency Oscillator
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: hosc
|
||||
|
||||
required:
|
||||
- "#clock-cells"
|
||||
- "#reset-cells"
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/sun9i-a80-ccu.h>
|
||||
|
||||
usb_clocks: clock@a08000 {
|
||||
compatible = "allwinner,sun9i-a80-usb-clks";
|
||||
reg = <0x00a08000 0x8>;
|
||||
clocks = <&ccu CLK_BUS_USB>, <&osc24M>;
|
||||
clock-names = "bus", "hosc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -66,8 +66,8 @@ properties:
|
||||
- arm,syscon-icst525-integratorcp-cm-mem
|
||||
- arm,integrator-cm-auxosc
|
||||
- arm,versatile-cm-auxosc
|
||||
- arm,impd-vco1
|
||||
- arm,impd-vco2
|
||||
- arm,impd1-vco1
|
||||
- arm,impd1-vco2
|
||||
|
||||
clocks:
|
||||
description: Parent clock for the ICST VCO
|
||||
|
||||
55
sys/contrib/device-tree/Bindings/clock/canaan,k210-clk.yaml
Normal file
55
sys/contrib/device-tree/Bindings/clock/canaan,k210-clk.yaml
Normal file
@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/canaan,k210-clk.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Canaan Kendryte K210 Clock Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Damien Le Moal <damien.lemoal@wdc.com>
|
||||
|
||||
description: |
|
||||
Canaan Kendryte K210 SoC clocks driver bindings. The clock
|
||||
controller node must be defined as a child node of the K210
|
||||
system controller node.
|
||||
|
||||
See also:
|
||||
- dt-bindings/clock/k210-clk.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: canaan,k210-clk
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description:
|
||||
Phandle of the SoC 26MHz fixed-rate oscillator clock.
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#clock-cells'
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/k210-clk.h>
|
||||
clocks {
|
||||
in0: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <26000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* ... */
|
||||
sysclk: clock-controller {
|
||||
#clock-cells = <1>;
|
||||
compatible = "canaan,k210-clk";
|
||||
clocks = <&in0>;
|
||||
};
|
||||
@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/fsl,flexspi-clock.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale FlexSPI clock driver for Layerscape SoCs
|
||||
|
||||
maintainers:
|
||||
- Michael Walle <michael@walle.cc>
|
||||
|
||||
description:
|
||||
The Freescale Layerscape SoCs have a special FlexSPI clock which is
|
||||
derived from the platform PLL.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,ls1028a-flexspi-clk
|
||||
- fsl,lx2160a-flexspi-clk
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
dcfg {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
fspi_clk: clock-controller@900 {
|
||||
compatible = "fsl,ls1028a-flexspi-clk";
|
||||
reg = <0x900 0x4>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&parentclk>;
|
||||
clock-output-names = "fspi_clk";
|
||||
};
|
||||
};
|
||||
@ -59,6 +59,12 @@ properties:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
idt,xtal-load-femtofarads:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 9000
|
||||
maximum: 22760
|
||||
description: Optional load capacitor for XTAL1 and XTAL2
|
||||
|
||||
patternProperties:
|
||||
"^OUT[1-4]$":
|
||||
type: object
|
||||
|
||||
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Clock bindings for Freescale i.MX27
|
||||
|
||||
maintainers:
|
||||
- Fabio Estevam <fabio.estevam@nxp.com>
|
||||
- Fabio Estevam <festevam@gmail.com>
|
||||
|
||||
description: |
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
|
||||
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Clock bindings for Freescale i.MX31
|
||||
|
||||
maintainers:
|
||||
- Fabio Estevam <fabio.estevam@nxp.com>
|
||||
- Fabio Estevam <festevam@gmail.com>
|
||||
|
||||
description: |
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
|
||||
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Clock bindings for Freescale i.MX5
|
||||
|
||||
maintainers:
|
||||
- Fabio Estevam <fabio.estevam@nxp.com>
|
||||
- Fabio Estevam <festevam@gmail.com>
|
||||
|
||||
description: |
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
|
||||
@ -21,27 +21,58 @@ description: |
|
||||
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell. See the full list of clock IDs from:
|
||||
include/dt-bindings/clock/imx8-clock.h
|
||||
include/dt-bindings/clock/imx8-lpcg.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx8qxp-lpcg-adma
|
||||
- fsl,imx8qxp-lpcg-conn
|
||||
- fsl,imx8qxp-lpcg-dc
|
||||
- fsl,imx8qxp-lpcg-dsp
|
||||
- fsl,imx8qxp-lpcg-gpu
|
||||
- fsl,imx8qxp-lpcg-hsio
|
||||
- fsl,imx8qxp-lpcg-img
|
||||
- fsl,imx8qxp-lpcg-lsio
|
||||
- fsl,imx8qxp-lpcg-vpu
|
||||
|
||||
oneOf:
|
||||
- const: fsl,imx8qxp-lpcg
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx8qm-lpcg
|
||||
- const: fsl,imx8qxp-lpcg
|
||||
- enum:
|
||||
- fsl,imx8qxp-lpcg-adma
|
||||
- fsl,imx8qxp-lpcg-conn
|
||||
- fsl,imx8qxp-lpcg-dc
|
||||
- fsl,imx8qxp-lpcg-dsp
|
||||
- fsl,imx8qxp-lpcg-gpu
|
||||
- fsl,imx8qxp-lpcg-hsio
|
||||
- fsl,imx8qxp-lpcg-img
|
||||
- fsl,imx8qxp-lpcg-lsio
|
||||
- fsl,imx8qxp-lpcg-vpu
|
||||
deprecated: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
description: |
|
||||
Input parent clocks phandle array for each clock
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
clock-indices:
|
||||
description: |
|
||||
An integer array indicating the bit offset for each clock.
|
||||
Refer to <include/dt-bindings/clock/imx8-lpcg.h> for the
|
||||
supported LPCG clock indices.
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
clock-output-names:
|
||||
description: |
|
||||
Shall be the corresponding names of the outputs.
|
||||
NOTE this property must be specified in the same order
|
||||
as the clock-indices property.
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@ -51,23 +82,33 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx8-clock.h>
|
||||
#include <dt-bindings/clock/imx8-lpcg.h>
|
||||
#include <dt-bindings/firmware/imx/rsrc.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
clock-controller@5b200000 {
|
||||
compatible = "fsl,imx8qxp-lpcg-conn";
|
||||
reg = <0x5b200000 0xb0000>;
|
||||
sdhc0_lpcg: clock-controller@5b200000 {
|
||||
compatible = "fsl,imx8qxp-lpcg";
|
||||
reg = <0x5b200000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&sdhc0_clk IMX_SC_PM_CLK_PER>,
|
||||
<&conn_ipg_clk>,
|
||||
<&conn_axi_clk>;
|
||||
clock-indices = <IMX_LPCG_CLK_0>,
|
||||
<IMX_LPCG_CLK_4>,
|
||||
<IMX_LPCG_CLK_5>;
|
||||
clock-output-names = "sdhc0_lpcg_per_clk",
|
||||
"sdhc0_lpcg_ipg_clk",
|
||||
"sdhc0_lpcg_ahb_clk";
|
||||
power-domains = <&pd IMX_SC_R_SDHC_0>;
|
||||
};
|
||||
|
||||
mmc@5b010000 {
|
||||
compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
|
||||
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x5b010000 0x10000>;
|
||||
clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC0_IPG_CLK>,
|
||||
<&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>,
|
||||
<&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>;
|
||||
clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
|
||||
<&sdhc0_lpcg IMX_LPCG_CLK_0>,
|
||||
<&sdhc0_lpcg IMX_LPCG_CLK_5>;
|
||||
clock-names = "ipg", "per", "ahb";
|
||||
power-domains = <&pd IMX_SC_R_SDHC_0>;
|
||||
};
|
||||
|
||||
@ -92,7 +92,7 @@ required:
|
||||
|
||||
patternProperties:
|
||||
"^usb-phy@[a-f0-9]+$":
|
||||
allOf: [ $ref: "../usb/ingenic,jz4770-phy.yaml#" ]
|
||||
allOf: [ $ref: "../phy/ingenic,phy-usb.yaml#" ]
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
46
sys/contrib/device-tree/Bindings/clock/intel,easic-n5x.yaml
Normal file
46
sys/contrib/device-tree/Bindings/clock/intel,easic-n5x.yaml
Normal file
@ -0,0 +1,46 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Intel SoCFPGA eASIC N5X platform clock controller binding
|
||||
|
||||
maintainers:
|
||||
- Dinh Nguyen <dinguyen@kernel.org>
|
||||
|
||||
description:
|
||||
The Intel eASIC N5X Clock controller is an integrated clock controller, which
|
||||
generates and supplies to all modules.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: intel,easic-n5x-clkmgr
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# Clock controller node:
|
||||
- |
|
||||
clkmgr: clock-controller@ffd10000 {
|
||||
compatible = "intel,easic-n5x-clkmgr";
|
||||
reg = <0xffd10000 0x1000>;
|
||||
clocks = <&osc1>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
...
|
||||
@ -0,0 +1,46 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MStar/Sigmastar MSC313 MPLL
|
||||
|
||||
maintainers:
|
||||
- Daniel Palmer <daniel@thingy.jp>
|
||||
|
||||
description: |
|
||||
The MStar/SigmaStar MSC313 and later ARMv7 chips have an MPLL block that
|
||||
takes the external xtal input and multiplies it to create a high
|
||||
frequency clock and divides that down into a number of clocks that
|
||||
peripherals use.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: mstar,msc313-mpll
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#clock-cells"
|
||||
- clocks
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mpll@206000 {
|
||||
compatible = "mstar,msc313-mpll";
|
||||
reg = <0x206000 0x200>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&xtal>;
|
||||
};
|
||||
51
sys/contrib/device-tree/Bindings/clock/qcom,a7pll.yaml
Normal file
51
sys/contrib/device-tree/Bindings/clock/qcom,a7pll.yaml
Normal file
@ -0,0 +1,51 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm A7 PLL Binding
|
||||
|
||||
maintainers:
|
||||
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
|
||||
description:
|
||||
The A7 PLL on the Qualcomm platforms like SDX55 is used to provide high
|
||||
frequency clock to the CPU.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sdx55-a7pll
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: board XO clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bi_tcxo
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
a7pll: clock@17808000 {
|
||||
compatible = "qcom,sdx55-a7pll";
|
||||
reg = <0x17808000 0x1000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "bi_tcxo";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs
|
||||
|
||||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description: |
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell.
|
||||
See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
|
||||
of Audio Clock controller clock IDs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sm8250-lpass-aon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: LPASS Core voting clock
|
||||
- description: Glitch Free Mux register clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: bus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
|
||||
#include <dt-bindings/sound/qcom,q6afe.h>
|
||||
clock-controller@3800000 {
|
||||
#clock-cells = <1>;
|
||||
compatible = "qcom,sm8250-lpass-aon";
|
||||
reg = <0x03380000 0x40000>;
|
||||
clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
|
||||
<&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
|
||||
clock-names = "core", "bus";
|
||||
};
|
||||
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs
|
||||
|
||||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description: |
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell.
|
||||
See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
|
||||
of Audio Clock controller clock IDs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sm8250-lpass-audiocc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: LPASS Core voting clock
|
||||
- description: Glitch Free Mux register clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: bus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
|
||||
#include <dt-bindings/sound/qcom,q6afe.h>
|
||||
clock-controller@3300000 {
|
||||
#clock-cells = <1>;
|
||||
compatible = "qcom,sm8250-lpass-audiocc";
|
||||
reg = <0x03300000 0x30000>;
|
||||
clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
|
||||
<&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
|
||||
clock-names = "core", "bus";
|
||||
};
|
||||
92
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sc7280.yaml
Normal file
92
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sc7280.yaml
Normal file
@ -0,0 +1,92 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Global Clock & Reset Controller Binding for SC7280
|
||||
|
||||
maintainers:
|
||||
- Taniya Das <tdas@codeaurora.org>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module which supports the clocks, resets and
|
||||
power domains on SC7280.
|
||||
|
||||
See also:
|
||||
- dt-bindings/clock/qcom,gcc-sc7280.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,gcc-sc7280
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Board active XO source
|
||||
- description: Sleep clock source
|
||||
- description: PCIE-0 pipe clock source
|
||||
- description: PCIE-1 pipe clock source
|
||||
- description: USF phy rx symbol 0 clock source
|
||||
- description: USF phy rx symbol 1 clock source
|
||||
- description: USF phy tx symbol 0 clock source
|
||||
- description: USB30 phy wrapper pipe clock source
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bi_tcxo
|
||||
- const: bi_tcxo_ao
|
||||
- const: sleep_clk
|
||||
- const: pcie_0_pipe_clk
|
||||
- const: pcie_1_pipe_clk
|
||||
- const: ufs_phy_rx_symbol_0_clk
|
||||
- const: ufs_phy_rx_symbol_1_clk
|
||||
- const: ufs_phy_tx_symbol_0_clk
|
||||
- const: usb3_phy_wrapper_gcc_usb30_pipe_clk
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
clock-controller@100000 {
|
||||
compatible = "qcom,gcc-sc7280";
|
||||
reg = <0x00100000 0x1f0000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&rpmhcc RPMH_CXO_CLK_A>,
|
||||
<&sleep_clk>,
|
||||
<&pcie_0_pipe_clk>, <&pcie_1_pipe_clk>,
|
||||
<&ufs_phy_rx_symbol_0_clk>, <&ufs_phy_rx_symbol_1_clk>,
|
||||
<&ufs_phy_tx_symbol_0_clk>,
|
||||
<&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
|
||||
|
||||
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "pcie_0_pipe_clk",
|
||||
"pcie_1_pipe_clk", "ufs_phy_rx_symbol_0_clk",
|
||||
"ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk",
|
||||
"usb3_phy_wrapper_gcc_usb30_pipe_clk";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
...
|
||||
76
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sc8180x.yaml
Normal file
76
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sc8180x.yaml
Normal file
@ -0,0 +1,76 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,gcc-sc8180x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Global Clock & Reset Controller Binding for SC8180x
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module which supports the clocks, resets and
|
||||
power domains on SC8180x.
|
||||
|
||||
See also:
|
||||
- dt-bindings/clock/qcom,gcc-sc8180x.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,gcc-sc8180x
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Board active XO source
|
||||
- description: Sleep clock source
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bi_tcxo
|
||||
- const: bi_tcxo_ao
|
||||
- const: sleep_clk
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
protected-clocks:
|
||||
description:
|
||||
Protected clock specifier list as per common clock binding.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
clock-controller@100000 {
|
||||
compatible = "qcom,gcc-sc8180x";
|
||||
reg = <0x00100000 0x1f0000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&rpmhcc RPMH_CXO_CLK_A>,
|
||||
<&sleep_clk>;
|
||||
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
...
|
||||
77
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sdx55.yaml
Normal file
77
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sdx55.yaml
Normal file
@ -0,0 +1,77 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Global Clock & Reset Controller Binding for SDX55
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module which supports the clocks, resets and
|
||||
power domains on SDX55
|
||||
|
||||
See also:
|
||||
- dt-bindings/clock/qcom,gcc-sdx55.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,gcc-sdx55
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Sleep clock source
|
||||
- description: PLL test clock source (Optional clock)
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bi_tcxo
|
||||
- const: sleep_clk
|
||||
- const: core_bi_pll_test_se # Optional clock
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
clock-controller@100000 {
|
||||
compatible = "qcom,gcc-sdx55";
|
||||
reg = <0x00100000 0x1f0000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&sleep_clk>, <&pll_test_clk>;
|
||||
clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
||||
96
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sm8350.yaml
Normal file
96
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sm8350.yaml
Normal file
@ -0,0 +1,96 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Global Clock & Reset Controller Binding for SM8350
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module which supports the clocks, resets and
|
||||
power domains on SM8350.
|
||||
|
||||
See also:
|
||||
- dt-bindings/clock/qcom,gcc-sm8350.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,gcc-sm8350
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Sleep clock source
|
||||
- description: PLL test clock source (Optional clock)
|
||||
- description: PCIE 0 Pipe clock source (Optional clock)
|
||||
- description: PCIE 1 Pipe clock source (Optional clock)
|
||||
- description: UFS card Rx symbol 0 clock source (Optional clock)
|
||||
- description: UFS card Rx symbol 1 clock source (Optional clock)
|
||||
- description: UFS card Tx symbol 0 clock source (Optional clock)
|
||||
- description: UFS phy Rx symbol 0 clock source (Optional clock)
|
||||
- description: UFS phy Rx symbol 1 clock source (Optional clock)
|
||||
- description: UFS phy Tx symbol 0 clock source (Optional clock)
|
||||
- description: USB3 phy wrapper pipe clock source (Optional clock)
|
||||
- description: USB3 phy sec pipe clock source (Optional clock)
|
||||
minItems: 2
|
||||
maxItems: 13
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bi_tcxo
|
||||
- const: sleep_clk
|
||||
- const: core_bi_pll_test_se # Optional clock
|
||||
- const: pcie_0_pipe_clk # Optional clock
|
||||
- const: pcie_1_pipe_clk # Optional clock
|
||||
- const: ufs_card_rx_symbol_0_clk # Optional clock
|
||||
- const: ufs_card_rx_symbol_1_clk # Optional clock
|
||||
- const: ufs_card_tx_symbol_0_clk # Optional clock
|
||||
- const: ufs_phy_rx_symbol_0_clk # Optional clock
|
||||
- const: ufs_phy_rx_symbol_1_clk # Optional clock
|
||||
- const: ufs_phy_tx_symbol_0_clk # Optional clock
|
||||
- const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock
|
||||
- const: usb3_uni_phy_sec_gcc_usb30_pipe_clk # Optional clock
|
||||
minItems: 2
|
||||
maxItems: 13
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
clock-controller@100000 {
|
||||
compatible = "qcom,gcc-sm8350";
|
||||
reg = <0x00100000 0x1f0000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&sleep_clk>;
|
||||
clock-names = "bi_tcxo", "sleep_clk";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -0,0 +1,76 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Graphics Clock & Reset Controller Binding for SDM630 and SDM660
|
||||
|
||||
maintainers:
|
||||
- AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
|
||||
|
||||
description: |
|
||||
Qualcomm graphics clock control module which supports the clocks, resets and
|
||||
power domains on SDM630 and SDM660.
|
||||
|
||||
See also dt-bindings/clock/qcom,gpucc-sdm660.h.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,gpucc-sdm630
|
||||
- qcom,gpucc-sdm660
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: GPLL0 main gpu branch
|
||||
- description: GPLL0 divider gpu branch
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xo
|
||||
- const: gcc_gpu_gpll0_clk
|
||||
- const: gcc_gpu_gpll0_div_clk
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm660.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
clock-controller@5065000 {
|
||||
compatible = "qcom,gpucc-sdm660";
|
||||
reg = <0x05065000 0x9038>;
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
|
||||
<&gcc GCC_GPU_GPLL0_CLK>,
|
||||
<&gcc GCC_GPU_GPLL0_DIV_CLK>;
|
||||
clock-names = "xo", "gcc_gpu_gpll0_clk",
|
||||
"gcc_gpu_gpll0_div_clk";
|
||||
#clock-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
...
|
||||
@ -24,6 +24,8 @@ properties:
|
||||
- qcom,mmcc-msm8974
|
||||
- qcom,mmcc-msm8996
|
||||
- qcom,mmcc-msm8998
|
||||
- qcom,mmcc-sdm630
|
||||
- qcom,mmcc-sdm660
|
||||
|
||||
clocks:
|
||||
items:
|
||||
|
||||
@ -18,9 +18,13 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-rpmh-clk
|
||||
- qcom,sc7280-rpmh-clk
|
||||
- qcom,sc8180x-rpmh-clk
|
||||
- qcom,sdm845-rpmh-clk
|
||||
- qcom,sdx55-rpmh-clk
|
||||
- qcom,sm8150-rpmh-clk
|
||||
- qcom,sm8250-rpmh-clk
|
||||
- qcom,sm8350-rpmh-clk
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
@ -0,0 +1,73 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,sc7180-camcc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Camera Clock & Reset Controller Binding for SC7180
|
||||
|
||||
maintainers:
|
||||
- Taniya Das <tdas@codeaurora.org>
|
||||
|
||||
description: |
|
||||
Qualcomm camera clock control module which supports the clocks, resets and
|
||||
power domains on SC7180.
|
||||
|
||||
See also:
|
||||
- dt-bindings/clock/qcom,camcc-sc7180.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sc7180-camcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Camera_ahb clock from GCC
|
||||
- description: Camera XO clock from GCC
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bi_tcxo
|
||||
- const: iface
|
||||
- const: xo
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sc7180.h>
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
clock-controller@ad00000 {
|
||||
compatible = "qcom,sc7180-camcc";
|
||||
reg = <0x0ad00000 0x10000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&gcc GCC_CAMERA_AHB_CLK>,
|
||||
<&gcc GCC_CAMERA_XO_CLK>;
|
||||
clock-names = "bi_tcxo", "iface", "xo";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
...
|
||||
@ -0,0 +1,103 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Renesas R-Car USB 2.0 clock selector
|
||||
|
||||
maintainers:
|
||||
- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
|
||||
|
||||
description: |
|
||||
If you connect an external clock to the USB_EXTAL pin only, you should set
|
||||
the clock rate to "usb_extal" node only.
|
||||
If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module
|
||||
is not needed because this is default setting. (Of course, you can set the
|
||||
clock rates to both "usb_extal" and "usb_xtal" nodes.
|
||||
|
||||
Case 1: An external clock connects to R-Car SoC
|
||||
+----------+ +--- R-Car ---------------------+
|
||||
|External |---|USB_EXTAL ---> all usb channels|
|
||||
|clock | |USB_XTAL |
|
||||
+----------+ +-------------------------------+
|
||||
|
||||
In this case, we need this driver with "usb_extal" clock.
|
||||
|
||||
Case 2: An oscillator connects to R-Car SoC
|
||||
+----------+ +--- R-Car ---------------------+
|
||||
|Oscillator|---|USB_EXTAL -+-> all usb channels|
|
||||
| |---|USB_XTAL --+ |
|
||||
+----------+ +-------------------------------+
|
||||
In this case, we don't need this selector.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r8a774a1-rcar-usb2-clock-sel # RZ/G2M
|
||||
- renesas,r8a774b1-rcar-usb2-clock-sel # RZ/G2N
|
||||
- renesas,r8a774e1-rcar-usb2-clock-sel # RZ/G2H
|
||||
- renesas,r8a7795-rcar-usb2-clock-sel # R-Car H3
|
||||
- renesas,r8a7796-rcar-usb2-clock-sel # R-Car M3-W
|
||||
- renesas,r8a77961-rcar-usb2-clock-sel # R-Car M3-W+
|
||||
- const: renesas,rcar-gen3-usb2-clock-sel
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ehci_ohci
|
||||
- const: hs-usb-if
|
||||
- const: usb_extal
|
||||
- const: usb_xtal
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: ehci_ohci
|
||||
- const: hs-usb-if
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- '#clock-cells'
|
||||
- power-domains
|
||||
- resets
|
||||
- reset-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
|
||||
#include <dt-bindings/power/r8a7795-sysc.h>
|
||||
|
||||
usb2_clksel: clock-controller@e6590630 {
|
||||
compatible = "renesas,r8a7795-rcar-usb2-clock-sel",
|
||||
"renesas,rcar-gen3-usb2-clock-sel";
|
||||
reg = <0xe6590630 0x02>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
|
||||
<&usb_extal>, <&usb_xtal>;
|
||||
clock-names = "ehci_ohci", "hs-usb-if", "usb_extal", "usb_xtal";
|
||||
#clock-cells = <0>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
reset-names = "ehci_ohci", "hs-usb-if";
|
||||
};
|
||||
@ -0,0 +1,60 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (C) 2020 SiFive, Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/sifive/fu740-prci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: SiFive FU740 Power Reset Clock Interrupt Controller (PRCI)
|
||||
|
||||
maintainers:
|
||||
- Zong Li <zong.li@sifive.com>
|
||||
- Paul Walmsley <paul.walmsley@sifive.com>
|
||||
|
||||
description:
|
||||
On the FU740 family of SoCs, most system-wide clock and reset integration
|
||||
is via the PRCI IP block.
|
||||
The clock consumer should specify the desired clock via the clock ID
|
||||
macros defined in include/dt-bindings/clock/sifive-fu740-prci.h.
|
||||
These macros begin with PRCI_CLK_.
|
||||
|
||||
The hfclk and rtcclk nodes are required, and represent physical
|
||||
crystals or resonators located on the PCB. These nodes should be present
|
||||
underneath /, rather than /soc.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sifive,fu740-c000-prci
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: high frequency clock.
|
||||
- description: RTL clock.
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: hfclk
|
||||
- const: rtcclk
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- "#clock-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
prci: clock-controller@10000000 {
|
||||
compatible = "sifive,fu740-c000-prci";
|
||||
reg = <0x10000000 0x1000>;
|
||||
clocks = <&hfclk>, <&rtcclk>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
@ -28,6 +28,8 @@ Optional properties:
|
||||
- clock-frequency: Output frequency to generate. This defines the output
|
||||
frequency set during boot. It can be reprogrammed during
|
||||
runtime through the common clock framework.
|
||||
- silabs,skip-recall: Do not perform NVM->RAM recall operation. It will rely
|
||||
on hardware loading of RAM from NVM at power on.
|
||||
|
||||
Example:
|
||||
si570: clock-generator@5d {
|
||||
|
||||
@ -37,7 +37,7 @@ properties:
|
||||
description: Size of the connector, should be specified in case of
|
||||
non-fullsize 'usb-a-connector' or 'usb-b-connector' compatible
|
||||
connectors.
|
||||
$ref: /schemas/types.yaml#definitions/string
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
enum:
|
||||
- mini
|
||||
@ -67,7 +67,7 @@ properties:
|
||||
power-role:
|
||||
description: Determines the power role that the Type C connector will
|
||||
support. "dual" refers to Dual Role Port (DRP).
|
||||
$ref: /schemas/types.yaml#definitions/string
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
enum:
|
||||
- source
|
||||
@ -76,7 +76,7 @@ properties:
|
||||
|
||||
try-power-role:
|
||||
description: Preferred power role.
|
||||
$ref: /schemas/types.yaml#definitions/string
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
enum:
|
||||
- source
|
||||
@ -86,13 +86,31 @@ properties:
|
||||
data-role:
|
||||
description: Data role if Type C connector supports USB data. "dual" refers
|
||||
Dual Role Device (DRD).
|
||||
$ref: /schemas/types.yaml#definitions/string
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
enum:
|
||||
- host
|
||||
- device
|
||||
- dual
|
||||
|
||||
typec-power-opmode:
|
||||
description: Determines the power operation mode that the Type C connector
|
||||
will support and will advertise through CC pins when it has no power
|
||||
delivery support.
|
||||
- "default" corresponds to default USB voltage and current defined by the
|
||||
USB 2.0 and USB 3.2 specifications, 5V 500mA for USB 2.0 ports and
|
||||
5V 900mA or 1500mA for USB 3.2 ports in single-lane or dual-lane
|
||||
operation respectively.
|
||||
- "1.5A" and "3.0A", 5V 1.5A and 5V 3.0A respectively, as defined in USB
|
||||
Type-C Cable and Connector specification, when Power Delivery is not
|
||||
supported.
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/string
|
||||
enum:
|
||||
- default
|
||||
- 1.5A
|
||||
- 3.0A
|
||||
|
||||
# The following are optional properties for "usb-c-connector" with power
|
||||
# delivery support.
|
||||
source-pdos:
|
||||
@ -119,34 +137,66 @@ properties:
|
||||
maxItems: 7
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
sink-vdos:
|
||||
description: An array of u32 with each entry, a Vendor Defined Message Object (VDO),
|
||||
providing additional information corresponding to the product, the detailed bit
|
||||
definitions and the order of each VDO can be found in
|
||||
"USB Power Delivery Specification Revision 3.0, Version 2.0 + ECNs 2020-12-10"
|
||||
chapter 6.4.4.3.1 Discover Identity. User can specify the VDO array via
|
||||
VDO_IDH/_CERT/_PRODUCT/_UFP/_DFP/_PCABLE/_ACABLE(1/2)/_VPD() defined in
|
||||
dt-bindings/usb/pd.h.
|
||||
minItems: 3
|
||||
maxItems: 6
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
op-sink-microwatt:
|
||||
description: Sink required operating power in microwatt, if source can't
|
||||
offer the power, Capability Mismatch is set. Required for power sink and
|
||||
power dual role.
|
||||
|
||||
ports:
|
||||
description: OF graph bindings (specified in bindings/graph.txt) that model
|
||||
any data bus to the connector unless the bus is between parent node and
|
||||
the connector. Since a single connector can have multiple data buses every
|
||||
bus has an assigned OF graph port number as described below.
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description: OF graph bindings modeling any data bus to the connector
|
||||
unless the bus is between parent node and the connector. Since a single
|
||||
connector can have multiple data buses every bus has an assigned OF graph
|
||||
port number as described below.
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: High Speed (HS), present in all connectors.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Super Speed (SS), present in SS capable connectors.
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Sideband Use (SBU), present in USB-C. This describes the
|
||||
alternate mode connection of which SBU is a part.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
new-source-frs-typec-current:
|
||||
description: Initial current capability of the new source when vSafe5V
|
||||
is applied during PD3.0 Fast Role Swap. "Table 6-14 Fixed Supply PDO - Sink"
|
||||
of "USB Power Delivery Specification Revision 3.0, Version 1.2" provides the
|
||||
different power levels and "6.4.1.3.1.6 Fast Role Swap USB Type-C Current"
|
||||
provides a detailed description of the field. The sink PDO from current source
|
||||
reflects the current source's(i.e. transmitter of the FRS signal) power
|
||||
requirement during fr swap. The current sink (i.e. receiver of the FRS signal),
|
||||
a.k.a new source, should check if it will be able to satisfy the current source's,
|
||||
new sink's, requirement during frswap before enabling the frs signal reception.
|
||||
This property refers to maximum current capability that the current sink can
|
||||
satisfy. During FRS, VBUS voltage is at 5V, as the partners are in implicit
|
||||
contract, hence, the power level is only a function of the current capability.
|
||||
"1" refers to default USB power level as described by "Table 6-14 Fixed Supply PDO - Sink".
|
||||
"2" refers to 1.5A@5V.
|
||||
"3" refers to 3.0A@5V.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [1, 2, 3]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -173,6 +223,12 @@ allOf:
|
||||
type:
|
||||
const: micro
|
||||
|
||||
anyOf:
|
||||
- not:
|
||||
required:
|
||||
- typec-power-opmode
|
||||
- new-source-frs-typec-current
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
|
||||
@ -46,8 +46,7 @@ properties:
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
const: allwinner,sun50i-h6-crypto
|
||||
const: allwinner,sun50i-h6-crypto
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
||||
@ -0,0 +1,45 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Intel Keem Bay OCS AES Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Daniele Alessandrelli <daniele.alessandrelli@intel.com>
|
||||
|
||||
description:
|
||||
The Intel Keem Bay Offload and Crypto Subsystem (OCS) AES engine provides
|
||||
hardware-accelerated AES/SM4 encryption/decryption.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: intel,keembay-ocs-aes
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
crypto@30008000 {
|
||||
compatible = "intel,keembay-ocs-aes";
|
||||
reg = <0x30008000 0x1000>;
|
||||
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&scmi_clk 95>;
|
||||
};
|
||||
@ -0,0 +1,46 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Intel Keem Bay OCS HCU Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Declan Murphy <declan.murphy@intel.com>
|
||||
- Daniele Alessandrelli <daniele.alessandrelli@intel.com>
|
||||
|
||||
description:
|
||||
The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU)
|
||||
provides hardware-accelerated hashing and HMAC.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: intel,keembay-ocs-hcu
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
crypto@3000b000 {
|
||||
compatible = "intel,keembay-ocs-hcu";
|
||||
reg = <0x3000b000 0x1000>;
|
||||
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&scmi_clk 94>;
|
||||
};
|
||||
@ -8,7 +8,6 @@ title: Samsung Exynos SoC SlimSSS (Slim Security SubSystem) module
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
- Kamil Konieczny <k.konieczny@partner.samsung.com>
|
||||
|
||||
description: |+
|
||||
The SlimSSS module in Exynos5433 SoC supports the following:
|
||||
|
||||
@ -8,7 +8,6 @@ title: Samsung Exynos SoC SSS (Security SubSystem) module
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
- Kamil Konieczny <k.konieczny@partner.samsung.com>
|
||||
|
||||
description: |+
|
||||
The SSS module in S5PV210 SoC supports the following:
|
||||
|
||||
@ -66,7 +66,7 @@ examples:
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
main_crypto: crypto@4e00000 {
|
||||
compatible = "ti,j721-sa2ul";
|
||||
compatible = "ti,j721e-sa2ul";
|
||||
reg = <0x4e00000 0x1200>;
|
||||
power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>;
|
||||
dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
|
||||
|
||||
@ -51,6 +51,19 @@ Optional properties only for parent bus device:
|
||||
- exynos,saturation-ratio: the percentage value which is used to calibrate
|
||||
the performance count against total cycle count.
|
||||
|
||||
Optional properties for the interconnect functionality (QoS frequency
|
||||
constraints):
|
||||
- #interconnect-cells: should be 0.
|
||||
- interconnects: as documented in ../interconnect.txt, describes a path at the
|
||||
higher level interconnects used by this interconnect provider.
|
||||
If this interconnect provider is directly linked to a top level interconnect
|
||||
provider the property contains only one phandle. The provider extends
|
||||
the interconnect graph by linking its node to a node registered by provider
|
||||
pointed to by first phandle in the 'interconnects' property.
|
||||
|
||||
- samsung,data-clock-ratio: ratio of the data throughput in B/s to minimum data
|
||||
clock frequency in Hz, default value is 8 when this property is missing.
|
||||
|
||||
Detailed correlation between sub-blocks and power line according to Exynos SoC:
|
||||
- In case of Exynos3250, there are two power line as following:
|
||||
VDD_MIF |--- DMC
|
||||
@ -135,7 +148,7 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC:
|
||||
|--- PERIC (Fixed clock rate)
|
||||
|--- FSYS (Fixed clock rate)
|
||||
|
||||
Example1:
|
||||
Example 1:
|
||||
Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
|
||||
power line (regulator). The MIF (Memory Interface) AXI bus is used to
|
||||
transfer data between DRAM and CPU and uses the VDD_MIF regulator.
|
||||
@ -184,7 +197,7 @@ Example1:
|
||||
|L5 |200000 |200000 |400000 |300000 | ||1000000 |
|
||||
----------------------------------------------------------
|
||||
|
||||
Example2 :
|
||||
Example 2:
|
||||
The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
|
||||
is listed below:
|
||||
|
||||
@ -419,3 +432,57 @@ Example2 :
|
||||
devfreq = <&bus_leftbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
Example 3:
|
||||
An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on
|
||||
Exynos4412 SoC with video mixer as an interconnect consumer device.
|
||||
|
||||
soc {
|
||||
bus_dmc: bus_dmc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_DMC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
samsung,data-clock-ratio = <4>;
|
||||
#interconnect-cells = <0>;
|
||||
};
|
||||
|
||||
bus_leftbus: bus_leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
#interconnect-cells = <0>;
|
||||
interconnects = <&bus_dmc>;
|
||||
};
|
||||
|
||||
bus_display: bus_display {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_display_opp_table>;
|
||||
#interconnect-cells = <0>;
|
||||
interconnects = <&bus_leftbus &bus_dmc>;
|
||||
};
|
||||
|
||||
bus_dmc_opp_table: opp_table1 {
|
||||
compatible = "operating-points-v2";
|
||||
/* ... */
|
||||
}
|
||||
|
||||
bus_leftbus_opp_table: opp_table3 {
|
||||
compatible = "operating-points-v2";
|
||||
/* ... */
|
||||
};
|
||||
|
||||
bus_display_opp_table: opp_table4 {
|
||||
compatible = "operating-points-v2";
|
||||
/* .. */
|
||||
};
|
||||
|
||||
&mixer {
|
||||
compatible = "samsung,exynos4212-mixer";
|
||||
interconnects = <&bus_display &bus_dmc>;
|
||||
/* ... */
|
||||
};
|
||||
};
|
||||
|
||||
@ -84,36 +84,23 @@ properties:
|
||||
const: dma-mem
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Output endpoints of the controller.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -57,35 +57,22 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoints of the controller.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -76,37 +76,24 @@ properties:
|
||||
- const: audio-tx
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoints of the controller. Usually an HDMI
|
||||
connector.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -115,31 +115,24 @@ properties:
|
||||
- const: lvds
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
Output endpoints of the controller.
|
||||
|
||||
patternProperties:
|
||||
"^endpoint(@[0-9])$":
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/$defs/endpoint-base
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
allwinner,tcon-channel:
|
||||
@ -156,16 +149,10 @@ properties:
|
||||
property is not present, the endpoint number will be
|
||||
used as the channel number.
|
||||
|
||||
unevaluatedProperties: true
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -24,11 +24,9 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
port:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoint, usually coming from the
|
||||
The first port should be the input endpoint, usually coming from the
|
||||
associated TCON.
|
||||
|
||||
required:
|
||||
|
||||
@ -46,36 +46,23 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoints of the controller.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -47,11 +47,9 @@ properties:
|
||||
const: dphy
|
||||
|
||||
port:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt. That
|
||||
port should be the input endpoint, usually coming from the
|
||||
The port should be the input endpoint, usually coming from the
|
||||
associated TCON.
|
||||
|
||||
required:
|
||||
|
||||
@ -43,35 +43,22 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoints of the controller.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -93,38 +93,25 @@ properties:
|
||||
The VCC power supply of the controller
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller. Usually the associated
|
||||
TCON.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoints of the controller. Usually an HDMI
|
||||
connector.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -80,141 +80,45 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
All ports should have only one endpoint connected to
|
||||
remote endpoint.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoint for Mixer 0 mux.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoint for Mixer 0 mux
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
reg: true
|
||||
|
||||
patternProperties:
|
||||
"^endpoint@[0-9]$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
ID of the target TCON
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoint for Mixer 1 mux.
|
||||
|
||||
port@3:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoint for Mixer 1 mux
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
reg: true
|
||||
|
||||
patternProperties:
|
||||
"^endpoint@[0-9]$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
ID of the target TCON
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
port@4:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoint for HDMI mux.
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
reg: true
|
||||
|
||||
patternProperties:
|
||||
"^endpoint@[0-9]$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
ID of the target TCON
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
port@5:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoint for HDMI mux
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
- port@4
|
||||
- port@5
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- "#clock-cells"
|
||||
- compatible
|
||||
|
||||
@ -40,36 +40,23 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoints of the controller.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -81,12 +81,12 @@ properties:
|
||||
description: phandle to an external 5V regulator to power the HDMI logic
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the VENC Input port node.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the TMDS Output port node.
|
||||
|
||||
|
||||
@ -83,12 +83,12 @@ properties:
|
||||
description: phandle to the associated power domain
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the CVBS VDAC port node.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the HDMI-TX port node.
|
||||
|
||||
|
||||
@ -53,6 +53,24 @@ properties:
|
||||
- const: audio
|
||||
- const: cec
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: CEC TX interrupt
|
||||
- description: CEC RX interrupt
|
||||
- description: CEC stuck at low interrupt
|
||||
- description: Wake-up interrupt
|
||||
- description: Hotplug connected interrupt
|
||||
- description: Hotplug removed interrupt
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: cec-tx
|
||||
- const: cec-rx
|
||||
- const: cec-low
|
||||
- const: wakeup
|
||||
- const: hpd-connected
|
||||
- const: hpd-removed
|
||||
|
||||
ddc:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/phandle
|
||||
@ -60,6 +78,7 @@ properties:
|
||||
Phandle of the I2C controller used for DDC EDID probing
|
||||
|
||||
hpd-gpios:
|
||||
maxItems: 1
|
||||
description: >
|
||||
The GPIO pin for the HDMI hotplug detect (if it doesn't appear
|
||||
as an interrupt/status bit in the HDMI controller itself)
|
||||
|
||||
@ -27,10 +27,9 @@ properties:
|
||||
- const: pixel
|
||||
|
||||
port:
|
||||
type: object
|
||||
description: >
|
||||
Port node with a single endpoint connecting to the panel, as
|
||||
defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Port node with a single endpoint connecting to the panel.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -18,6 +18,7 @@ properties:
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- brcm,bcm2711-dsi1
|
||||
- brcm,bcm2835-dsi0
|
||||
- brcm,bcm2835-dsi1
|
||||
|
||||
|
||||
@ -37,6 +37,7 @@ properties:
|
||||
Phandle of the I2C controller used for DDC EDID probing
|
||||
|
||||
hpd-gpios:
|
||||
maxItems: 1
|
||||
description: >
|
||||
The GPIO pin for the HDMI hotplug detect (if it doesn't appear
|
||||
as an interrupt/status bit in the HDMI controller itself)
|
||||
|
||||
@ -36,7 +36,7 @@ if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm2711-hvs"
|
||||
const: brcm,bcm2711-hvs
|
||||
|
||||
then:
|
||||
required:
|
||||
|
||||
@ -0,0 +1,95 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2019 Analogix Semiconductor, Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter)
|
||||
|
||||
maintainers:
|
||||
- Xin Ji <xji@analogixsemi.com>
|
||||
|
||||
description: |
|
||||
The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
|
||||
designed for portable devices.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: analogix,anx7625
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description: used for interrupt pin B8.
|
||||
maxItems: 1
|
||||
|
||||
enable-gpios:
|
||||
description: used for power on chip control, POWER_EN pin D2.
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
description: used for reset chip control, RESET_N pin B7.
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for MIPI DSI input.
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for panel or connector.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
encoder@58 {
|
||||
compatible = "analogix,anx7625";
|
||||
reg = <0x58>;
|
||||
enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi2dp_bridge_in: port@0 {
|
||||
reg = <0>;
|
||||
anx7625_in: endpoint {
|
||||
remote-endpoint = <&mipi_dsi>;
|
||||
};
|
||||
};
|
||||
|
||||
mipi2dp_bridge_out: port@1 {
|
||||
reg = <1>;
|
||||
anx7625_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -42,31 +42,18 @@ properties:
|
||||
description: Regulator for 1.0V digital core power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing input and output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Video port for HDMI input.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for SlimPort, DisplayPort, eDP or MyDP output.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
@ -26,39 +26,29 @@ properties:
|
||||
description: GPIO connected to active low reset
|
||||
|
||||
dvdd12-supply:
|
||||
maxItems: 1
|
||||
description: Regulator for 1.2V digital core power.
|
||||
|
||||
dvdd25-supply:
|
||||
maxItems: 1
|
||||
description: Regulator for 2.5V digital core power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for LVTTL input
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for eDP output (panel or connector).
|
||||
May be omitted if EDID works reliably.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -57,47 +57,37 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
Ports as described in Documentation/devicetree/bindings/graph.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
First input port representing the DP bridge input.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Second input port representing the DP bridge input.
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Third input port representing the DP bridge input.
|
||||
|
||||
port@3:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Fourth input port representing the DP bridge input.
|
||||
|
||||
port@4:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Output port representing the DP bridge output.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@4
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
|
||||
@ -19,16 +19,16 @@ properties:
|
||||
description: I2C address of the device
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Video port for RGB input.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
DVI port, should be connected to a node compatible with the
|
||||
dvi-connector binding.
|
||||
|
||||
@ -0,0 +1,93 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/intel,keembay-dsi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Devicetree bindings for Intel Keem Bay mipi dsi controller
|
||||
|
||||
maintainers:
|
||||
- Anitha Chrisanthus <anitha.chrisanthus@intel.com>
|
||||
- Edmond J Dea <edmund.j.dea@intel.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: intel,keembay-dsi
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: MIPI registers range
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: mipi
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: MIPI DSI clock
|
||||
- description: MIPI DSI econfig clock
|
||||
- description: MIPI DSI config clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: clk_mipi
|
||||
- const: clk_mipi_ecfg
|
||||
- const: clk_mipi_cfg
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: MIPI DSI input port.
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: DSI output port.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mipi-dsi@20900000 {
|
||||
compatible = "intel,keembay-dsi";
|
||||
reg = <0x20900000 0x4000>;
|
||||
reg-names = "mipi";
|
||||
clocks = <&scmi_clk 0x86>,
|
||||
<&scmi_clk 0x88>,
|
||||
<&scmi_clk 0x89>;
|
||||
clock-names = "clk_mipi", "clk_mipi_ecfg",
|
||||
"clk_mipi_cfg";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
dsi_in: endpoint {
|
||||
remote-endpoint = <&disp_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dsi_out: endpoint {
|
||||
remote-endpoint = <&adv7535_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -35,11 +35,9 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
ovdd-supply:
|
||||
maxItems: 1
|
||||
description: I/O voltage
|
||||
|
||||
pwr18-supply:
|
||||
maxItems: 1
|
||||
description: core voltage
|
||||
|
||||
interrupts:
|
||||
@ -55,7 +53,7 @@ properties:
|
||||
description: extcon specifier for the Power Delivery
|
||||
|
||||
port:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: A port node pointing to DPI host port node
|
||||
|
||||
required:
|
||||
|
||||
@ -4,18 +4,19 @@
|
||||
$id: http://devicetree.org/schemas/display/bridge/lontium,lt9611.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lontium LT9611 2 Port MIPI to HDMI Bridge
|
||||
title: Lontium LT9611(UXC) 2 Port MIPI to HDMI Bridge
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
|
||||
description: |
|
||||
The LT9611 is a bridge device which converts DSI to HDMI
|
||||
The LT9611 and LT9611UXC are bridge devices which convert DSI to HDMI
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- lontium,lt9611
|
||||
- lontium,lt9611uxc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@ -37,82 +38,26 @@ properties:
|
||||
description: Regulator for 3.3V IO power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Primary MIPI port-1 for MIPI input
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^endpoint(@[0-9])$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Additional MIPI port-2 for MIPI input, used in combination
|
||||
with primary MIPI port-1 to drive higher resolution displays
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
"^endpoint(@[0-9])$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
HDMI port for HDMI output
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 2
|
||||
|
||||
patternProperties:
|
||||
"^endpoint(@[0-9])$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@2
|
||||
|
||||
|
||||
@ -45,25 +45,17 @@ properties:
|
||||
- thine,thc63lvdm83d # For the THC63LVDM83D LVDS serializer
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
This device has two video ports. Their connections are modeled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
For LVDS encoders, port 0 is the parallel input
|
||||
For LVDS decoders, port 0 is the LVDS input
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
For LVDS encoders, port 1 is the LVDS output
|
||||
For LVDS decoders, port 1 is the parallel output
|
||||
@ -72,15 +64,12 @@ properties:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
powerdown-gpios:
|
||||
description:
|
||||
The GPIO used to control the power down line of this device.
|
||||
maxItems: 1
|
||||
|
||||
power-supply:
|
||||
maxItems: 1
|
||||
power-supply: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -84,40 +84,23 @@ properties:
|
||||
- const: pclk
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing DSI input & output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/graph.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
description:
|
||||
Input port node to receive pixel data from the
|
||||
display controller. Exactly one endpoint must be
|
||||
specified.
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
endpoint@0:
|
||||
$ref: /schemas/graph.yaml#/properties/endpoint
|
||||
description: sub-node describing the input from LCDIF
|
||||
type: object
|
||||
|
||||
endpoint@1:
|
||||
$ref: /schemas/graph.yaml#/properties/endpoint
|
||||
description: sub-node describing the input from DCSS
|
||||
type: object
|
||||
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- reg
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
@ -125,28 +108,18 @@ properties:
|
||||
- required:
|
||||
- endpoint@1
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
DSI output port node to the panel or the next bridge
|
||||
in the chain
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user