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Update the mxge driver.

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- Update the firmware to the latest released firmware
  (1.4.3), which corresponds to the firmware in the
  latest shipping drivers from Myricom.  This firmware
  fixes several bugs in the firmware's PCI-e implementation,
  and it also changes the driver/firmware interface:

  o TSO was added, and changed the format of the transmit
    descriptors.
  o The firmware no longer counts transmits descriptors,
    but frames.  So the driver needs to keep a count
    of the number of frames sent.
  o The weird interrupt strategy changed to a normal receive
    return ring.  This ring is much bigger, and we may be
    able to support DEVICE_POLLING.
  o Myricom's header files changed the name of firmware
    related #define's and enums (s/_MCP_/FW_).

- Stopped spamming the console with lots of printfs unless
  mxge_verbose (or bootverbose) is set.

- Made additional information available via sysctl, including
  the results of a PCI-e DMA benchmark run at device reset.

- Decreased the excessively long timeouts when sending commands
  from 2 seconds to 20ms.

Sponsored by: Myricom Inc.
This commit is contained in:
Andrew Gallatin 2006-06-14 16:23:17 +00:00
parent 81623278a5
commit 5e7d85418b
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=159612
5 changed files with 2003 additions and 1702 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1326
sys/dev/mxge/eth_z8e.dat.gz.uu
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1334
sys/dev/mxge/ethp_z8e.dat.gz.uu
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777
sys/dev/mxge/if_mxge.c
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46
sys/dev/mxge/if_mxge_var.h
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@ -43,7 +43,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define MXGE_FW_OFFSET 1024*1024
#define MXGE_EEPROM_STRINGS_SIZE 256
#define MXGE_NUM_INTRQS 2
#define MXGE_MAX_SEND_DESC 12
typedef struct {
void *addr;
@ -52,18 +52,13 @@ typedef struct {
bus_dmamap_t map;
} mxge_dma_t;
typedef struct mxge_intrq
{
mcp_slot_t *q[MXGE_NUM_INTRQS];
int intrq;
int slot;
int maxslots;
uint32_t seqnum;
uint32_t spurious;
uint32_t cnt;
mxge_dma_t dma[MXGE_NUM_INTRQS];
} mxge_intrq_t;
typedef struct {
mcp_slot_t *entry;
mxge_dma_t dma;
int cnt;
int idx;
} mxge_rx_done_t;
typedef struct
{
@ -72,17 +67,23 @@ typedef struct
uint32_t data2;
} mxge_cmd_t;
struct mxge_buffer_state {
struct mxge_rx_buffer_state {
struct mbuf *m;
bus_dmamap_t map;
};
struct mxge_tx_buffer_state {
struct mbuf *m;
bus_dmamap_t map;
int flag;
};
typedef struct
{
volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */
mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
struct mxge_buffer_state *info;
struct mxge_rx_buffer_state *info;
bus_dma_tag_t dmat;
bus_dmamap_t extra_map;
int cnt;
@ -96,11 +97,12 @@ typedef struct
volatile uint8_t *wc_fifo; /* w/c send fifo address */
mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
char *req_bytes;
struct mxge_buffer_state *info;
struct mxge_tx_buffer_state *info;
bus_dma_tag_t dmat;
int req; /* transmits submitted */
int mask; /* number of transmit slots -1 */
int done; /* transmits completed */
int pkt_done; /* packets completed */
int boundary; /* boundary transmits cannot cross*/
} mxge_tx_buf_t;
@ -113,23 +115,23 @@ typedef struct {
mxge_tx_buf_t tx; /* transmit ring */
mxge_rx_buf_t rx_small;
mxge_rx_buf_t rx_big;
mxge_rx_done_t rx_done;
mcp_irq_data_t *fw_stats;
bus_dma_tag_t parent_dmat;
volatile uint8_t *sram;
int sram_size;
volatile uint32_t *irq_deassert;
volatile uint32_t *irq_claim;
char *mac_addr_string;
char *product_code_string;
mcp_cmd_response_t *cmd;
mxge_dma_t cmd_dma;
mxge_dma_t zeropad_dma;
mcp_stats_t *fw_stats;
mxge_dma_t fw_stats_dma;
struct pci_dev *pdev;
int msi_enabled;
mxge_intrq_t intr;
int link_state;
unsigned int rdma_tags_available;
int intr_coal_delay;
volatile uint32_t *intr_coal_delay_ptr;
int wc;
struct mtx cmd_lock;
struct sx driver_lock;
@ -147,6 +149,12 @@ typedef struct {
char fw_version[128];
device_t dev;
struct ifmedia media;
int read_dma;
int write_dma;
int read_write_dma;
char *mac_addr_string;
char product_code_string[64];
char serial_number_string[64];
} mxge_softc_t;

222
sys/dev/mxge/mxge_mcp.h
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@ -32,10 +32,13 @@ POSSIBILITY OF SUCH DAMAGE.
$FreeBSD$
***************************************************************************/
#ifndef _mxge_mcp_h
#define _mxge_mcp_h
#ifndef _myri10ge_mcp_h
#define _myri10ge_mcp_h
#ifdef MXGE_MCP
#define MXGEFW_VERSION_MAJOR 1
#define MXGEFW_VERSION_MINOR 4
#ifdef MXGEFW
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed int int32_t;
@ -47,43 +50,39 @@ typedef unsigned long long uint64_t;
#endif
/* 8 Bytes */
typedef struct
{
struct mcp_dma_addr {
uint32_t high;
uint32_t low;
} mcp_dma_addr_t;
};
typedef struct mcp_dma_addr mcp_dma_addr_t;
/* 16 Bytes */
typedef struct
{
uint32_t data0;
uint32_t data1;
uint32_t seqnum;
uint16_t index;
uint8_t flag;
uint8_t type;
} mcp_slot_t;
/* 4 Bytes */
struct mcp_slot {
uint16_t checksum;
uint16_t length;
};
typedef struct mcp_slot mcp_slot_t;
/* 64 Bytes */
typedef struct
{
struct mcp_cmd {
uint32_t cmd;
uint32_t data0; /* will be low portion if data > 32 bits */
/* 8 */
uint32_t data1; /* will be high portion if data > 32 bits */
uint32_t data2; /* currently unused.. */
/* 16 */
mcp_dma_addr_t response_addr;
struct mcp_dma_addr response_addr;
/* 24 */
uint8_t pad[40];
} mcp_cmd_t;
};
typedef struct mcp_cmd mcp_cmd_t;
/* 8 Bytes */
typedef struct
{
struct mcp_cmd_response {
uint32_t data;
uint32_t result;
} mcp_cmd_response_t;
};
typedef struct mcp_cmd_response mcp_cmd_response_t;
@ -98,111 +97,111 @@ typedef struct
The PADDED flags is set if the packet needs to be padded, and it
must be set for all segments.
The MXGE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative
The MXGEFW_FLAGS_ALIGN_ODD must be set if the cumulative
length of all previous segments was odd.
*/
#define MXGE_MCP_ETHER_FLAGS_VALID 0x1
#define MXGE_MCP_ETHER_FLAGS_FIRST 0x2
#define MXGE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4
#define MXGE_MCP_ETHER_FLAGS_CKSUM 0x8
#define MXGE_MCP_ETHER_FLAGS_SMALL 0x10
#define MXGE_MCP_ETHER_FLAGS_NOT_LAST 0x100
#define MXGE_MCP_ETHER_FLAGS_TSO_HDR 0x200
#define MXGE_MCP_ETHER_FLAGS_TSO 0x400
#define MXGEFW_FLAGS_SMALL 0x1
#define MXGEFW_FLAGS_TSO_HDR 0x1
#define MXGEFW_FLAGS_FIRST 0x2
#define MXGEFW_FLAGS_ALIGN_ODD 0x4
#define MXGEFW_FLAGS_CKSUM 0x8
#define MXGEFW_FLAGS_TSO_LAST 0x8
#define MXGEFW_FLAGS_NO_TSO 0x10
#define MXGEFW_FLAGS_TSO_CHOP 0x10
#define MXGEFW_FLAGS_TSO_PLD 0x20
#define MXGE_MCP_ETHER_SEND_SMALL_SIZE 1520
#define MXGE_MCP_ETHER_MAX_MTU 9400
#define MXGEFW_SEND_SMALL_SIZE 1520
#define MXGEFW_MAX_MTU 9400
typedef union mcp_pso_or_cumlen
{
union mcp_pso_or_cumlen {
uint16_t pseudo_hdr_offset;
uint16_t cum_len;
} mcp_pso_or_cumlen_t;
};
typedef union mcp_pso_or_cumlen mcp_pso_or_cumlen_t;
#define MXGE_MCP_ETHER_MAX_SEND_DESC 12
#define MXGE_MCP_ETHER_PAD 2
#define MXGEFW_MAX_SEND_DESC 12
#define MXGEFW_PAD 2
/* 16 Bytes */
typedef struct
{
struct mcp_kreq_ether_send {
uint32_t addr_high;
uint32_t addr_low;
uint16_t length;
uint8_t pad;
uint8_t cksum_offset; /* where to start computing cksum */
uint16_t pseudo_hdr_offset;
uint16_t flags; /* as defined above */
} mcp_kreq_ether_send_t;
uint16_t length;
uint8_t pad;
uint8_t rdma_count;
uint8_t cksum_offset; /* where to start computing cksum */
uint8_t flags; /* as defined above */
};
typedef struct mcp_kreq_ether_send mcp_kreq_ether_send_t;
/* 8 Bytes */
typedef struct
{
struct mcp_kreq_ether_recv {
uint32_t addr_high;
uint32_t addr_low;
} mcp_kreq_ether_recv_t;
};
typedef struct mcp_kreq_ether_recv mcp_kreq_ether_recv_t;
/* Commands */
#define MXGE_MCP_CMD_OFFSET 0xf80000
#define MXGEFW_CMD_OFFSET 0xf80000
typedef enum {
MXGE_MCP_CMD_NONE = 0,
enum myri10ge_mcp_cmd_type {
MXGEFW_CMD_NONE = 0,
/* Reset the mcp, it is left in a safe state, waiting
for the driver to set all its parameters */
MXGE_MCP_CMD_RESET,
MXGEFW_CMD_RESET,
/* get the version number of the current firmware..
(may be available in the eeprom strings..? */
MXGE_MCP_GET_MCP_VERSION,
MXGEFW_GET_MCP_VERSION,
/* Parameters which must be set by the driver before it can
issue MXGE_MCP_CMD_ETHERNET_UP. They persist until the next
MXGE_MCP_CMD_RESET is issued */
issue MXGEFW_CMD_ETHERNET_UP. They persist until the next
MXGEFW_CMD_RESET is issued */
MXGE_MCP_CMD_SET_INTRQ0_DMA,
MXGE_MCP_CMD_SET_INTRQ1_DMA,
MXGE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
MXGE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
MXGEFW_CMD_SET_INTRQ_DMA,
MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
/* Parameters which refer to lanai SRAM addresses where the
driver must issue PIO writes for various things */
MXGE_MCP_CMD_GET_SEND_OFFSET,
MXGE_MCP_CMD_GET_SMALL_RX_OFFSET,
MXGE_MCP_CMD_GET_BIG_RX_OFFSET,
MXGE_MCP_CMD_GET_IRQ_ACK_OFFSET,
MXGE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET,
MXGE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET,
MXGEFW_CMD_GET_SEND_OFFSET,
MXGEFW_CMD_GET_SMALL_RX_OFFSET,
MXGEFW_CMD_GET_BIG_RX_OFFSET,
MXGEFW_CMD_GET_IRQ_ACK_OFFSET,
MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
/* Parameters which refer to rings stored on the MCP,
and whose size is controlled by the mcp */
MXGE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */
MXGE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */
MXGEFW_CMD_GET_SEND_RING_SIZE, /* in bytes */
MXGEFW_CMD_GET_RX_RING_SIZE, /* in bytes */
/* Parameters which refer to rings stored in the host,
and whose size is controlled by the host. Note that
all must be physically contiguous and must contain
a power of 2 number of entries. */
MXGE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */
MXGEFW_CMD_SET_INTRQ_SIZE, /* in bytes */
/* command to bring ethernet interface up. Above parameters
(plus mtu & mac address) must have been exchanged prior
to issuing this command */
MXGE_MCP_CMD_ETHERNET_UP,
MXGEFW_CMD_ETHERNET_UP,
/* command to bring ethernet interface down. No further sends
or receives may be processed until an MXGE_MCP_CMD_ETHERNET_UP
or receives may be processed until an MXGEFW_CMD_ETHERNET_UP
is issued, and all interrupt queues must be flushed prior
to ack'ing this command */
MXGE_MCP_CMD_ETHERNET_DOWN,
MXGEFW_CMD_ETHERNET_DOWN,
/* commands the driver may issue live, without resetting
the nic. Note that increasing the mtu "live" should
@ -210,46 +209,46 @@ typedef enum {
sufficiently large to handle the new mtu. Decreasing
the mtu live is safe */
MXGE_MCP_CMD_SET_MTU,
MXGE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */
MXGE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */
MXGE_MCP_CMD_SET_STATS_DMA,
MXGEFW_CMD_SET_MTU,
MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, /* in microseconds */
MXGEFW_CMD_SET_STATS_INTERVAL, /* in microseconds */
MXGEFW_CMD_SET_STATS_DMA,
MXGE_MCP_ENABLE_PROMISC,
MXGE_MCP_DISABLE_PROMISC,
MXGE_MCP_SET_MAC_ADDRESS,
MXGEFW_ENABLE_PROMISC,
MXGEFW_DISABLE_PROMISC,
MXGEFW_SET_MAC_ADDRESS,
MXGE_MCP_ENABLE_FLOW_CONTROL,
MXGE_MCP_DISABLE_FLOW_CONTROL
} mxge_mcp_cmd_type_t;
MXGEFW_ENABLE_FLOW_CONTROL,
MXGEFW_DISABLE_FLOW_CONTROL,
/* do a DMA test
data0,data1 = DMA address
data2 = RDMA length (MSH), WDMA length (LSH)
command return data = repetitions (MSH), 0.5-ms ticks (LSH)
*/
MXGEFW_DMA_TEST
};
typedef enum myri10ge_mcp_cmd_type myri10ge_mcp_cmd_type_t;
typedef enum {
MXGE_MCP_CMD_OK = 0,
MXGE_MCP_CMD_UNKNOWN,
MXGE_MCP_CMD_ERROR_RANGE,
MXGE_MCP_CMD_ERROR_BUSY,
MXGE_MCP_CMD_ERROR_EMPTY,
MXGE_MCP_CMD_ERROR_CLOSED,
MXGE_MCP_CMD_ERROR_HASH_ERROR,
MXGE_MCP_CMD_ERROR_BAD_PORT,
MXGE_MCP_CMD_ERROR_RESOURCES
} mxge_mcp_cmd_status_t;
typedef enum {
MXGE_MCP_INTR_NONE = 0,
MXGE_MCP_INTR_ETHER_SEND_DONE,
MXGE_MCP_INTR_ETHER_RECV_SMALL,
MXGE_MCP_INTR_ETHER_RECV_BIG,
MXGE_MCP_INTR_LINK_CHANGE,
MXGE_MCP_INTR_STATS_UPDATE,
MXGE_MCP_INTR_ETHER_DOWN
} mxge_mcp_intr_type_t;
enum myri10ge_mcp_cmd_status {
MXGEFW_CMD_OK = 0,
MXGEFW_CMD_UNKNOWN,
MXGEFW_CMD_ERROR_RANGE,
MXGEFW_CMD_ERROR_BUSY,
MXGEFW_CMD_ERROR_EMPTY,
MXGEFW_CMD_ERROR_CLOSED,
MXGEFW_CMD_ERROR_HASH_ERROR,
MXGEFW_CMD_ERROR_BAD_PORT,
MXGEFW_CMD_ERROR_RESOURCES
};
typedef enum myri10ge_mcp_cmd_status myri10ge_mcp_cmd_status_t;
/* 32 Bytes */
typedef struct
{
/* 40 Bytes */
struct mcp_irq_data {
uint32_t send_done_count;
uint32_t link_up;
uint32_t dropped_link_overflow;
uint32_t dropped_link_error_or_filtered;
@ -257,9 +256,14 @@ typedef struct
uint32_t dropped_overrun;
uint32_t dropped_no_small_buffer;
uint32_t dropped_no_big_buffer;
uint32_t dropped_interrupt_busy;
uint32_t rdma_tags_available;
} mcp_stats_t;
uint8_t tx_stopped;
uint8_t link_down;
uint8_t stats_updated;
uint8_t valid;
};
typedef struct mcp_irq_data mcp_irq_data_t;
#endif /* _mxge_mcp_h */
#endif /* _myri10ge_mcp_h */