Update the mxge driver.
- Update the firmware to the latest released firmware (1.4.3), which corresponds to the firmware in the latest shipping drivers from Myricom. This firmware fixes several bugs in the firmware's PCI-e implementation, and it also changes the driver/firmware interface: o TSO was added, and changed the format of the transmit descriptors. o The firmware no longer counts transmits descriptors, but frames. So the driver needs to keep a count of the number of frames sent. o The weird interrupt strategy changed to a normal receive return ring. This ring is much bigger, and we may be able to support DEVICE_POLLING. o Myricom's header files changed the name of firmware related #define's and enums (s/_MCP_/FW_). - Stopped spamming the console with lots of printfs unless mxge_verbose (or bootverbose) is set. - Made additional information available via sysctl, including the results of a PCI-e DMA benchmark run at device reset. - Decreased the excessively long timeouts when sending commands from 2 seconds to 20ms. Sponsored by: Myricom Inc.
This commit is contained in:
parent
81623278a5
commit
5e7d85418b
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=159612
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@ -43,7 +43,7 @@ POSSIBILITY OF SUCH DAMAGE.
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#define MXGE_FW_OFFSET 1024*1024
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#define MXGE_EEPROM_STRINGS_SIZE 256
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#define MXGE_NUM_INTRQS 2
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#define MXGE_MAX_SEND_DESC 12
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typedef struct {
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void *addr;
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@ -52,18 +52,13 @@ typedef struct {
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bus_dmamap_t map;
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} mxge_dma_t;
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typedef struct mxge_intrq
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{
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mcp_slot_t *q[MXGE_NUM_INTRQS];
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int intrq;
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int slot;
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int maxslots;
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uint32_t seqnum;
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uint32_t spurious;
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uint32_t cnt;
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mxge_dma_t dma[MXGE_NUM_INTRQS];
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} mxge_intrq_t;
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typedef struct {
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mcp_slot_t *entry;
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mxge_dma_t dma;
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int cnt;
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int idx;
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} mxge_rx_done_t;
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typedef struct
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{
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@ -72,17 +67,23 @@ typedef struct
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uint32_t data2;
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} mxge_cmd_t;
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struct mxge_buffer_state {
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struct mxge_rx_buffer_state {
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struct mbuf *m;
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bus_dmamap_t map;
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};
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struct mxge_tx_buffer_state {
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struct mbuf *m;
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bus_dmamap_t map;
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int flag;
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};
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typedef struct
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{
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volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
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volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */
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mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
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struct mxge_buffer_state *info;
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struct mxge_rx_buffer_state *info;
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bus_dma_tag_t dmat;
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bus_dmamap_t extra_map;
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int cnt;
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@ -96,11 +97,12 @@ typedef struct
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volatile uint8_t *wc_fifo; /* w/c send fifo address */
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mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
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char *req_bytes;
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struct mxge_buffer_state *info;
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struct mxge_tx_buffer_state *info;
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bus_dma_tag_t dmat;
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int req; /* transmits submitted */
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int mask; /* number of transmit slots -1 */
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int done; /* transmits completed */
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int pkt_done; /* packets completed */
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int boundary; /* boundary transmits cannot cross*/
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} mxge_tx_buf_t;
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@ -113,23 +115,23 @@ typedef struct {
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mxge_tx_buf_t tx; /* transmit ring */
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mxge_rx_buf_t rx_small;
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mxge_rx_buf_t rx_big;
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mxge_rx_done_t rx_done;
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mcp_irq_data_t *fw_stats;
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bus_dma_tag_t parent_dmat;
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volatile uint8_t *sram;
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int sram_size;
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volatile uint32_t *irq_deassert;
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volatile uint32_t *irq_claim;
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char *mac_addr_string;
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char *product_code_string;
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mcp_cmd_response_t *cmd;
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mxge_dma_t cmd_dma;
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mxge_dma_t zeropad_dma;
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mcp_stats_t *fw_stats;
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mxge_dma_t fw_stats_dma;
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struct pci_dev *pdev;
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int msi_enabled;
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mxge_intrq_t intr;
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int link_state;
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unsigned int rdma_tags_available;
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int intr_coal_delay;
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volatile uint32_t *intr_coal_delay_ptr;
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int wc;
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struct mtx cmd_lock;
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struct sx driver_lock;
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@ -147,6 +149,12 @@ typedef struct {
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char fw_version[128];
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device_t dev;
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struct ifmedia media;
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int read_dma;
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int write_dma;
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int read_write_dma;
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char *mac_addr_string;
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char product_code_string[64];
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char serial_number_string[64];
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} mxge_softc_t;
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@ -32,10 +32,13 @@ POSSIBILITY OF SUCH DAMAGE.
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$FreeBSD$
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***************************************************************************/
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#ifndef _mxge_mcp_h
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#define _mxge_mcp_h
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#ifndef _myri10ge_mcp_h
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#define _myri10ge_mcp_h
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#ifdef MXGE_MCP
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#define MXGEFW_VERSION_MAJOR 1
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#define MXGEFW_VERSION_MINOR 4
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#ifdef MXGEFW
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typedef signed char int8_t;
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typedef signed short int16_t;
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typedef signed int int32_t;
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@ -47,43 +50,39 @@ typedef unsigned long long uint64_t;
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#endif
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/* 8 Bytes */
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typedef struct
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{
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struct mcp_dma_addr {
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uint32_t high;
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uint32_t low;
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} mcp_dma_addr_t;
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};
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typedef struct mcp_dma_addr mcp_dma_addr_t;
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/* 16 Bytes */
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typedef struct
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{
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uint32_t data0;
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uint32_t data1;
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uint32_t seqnum;
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uint16_t index;
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uint8_t flag;
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uint8_t type;
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} mcp_slot_t;
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/* 4 Bytes */
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struct mcp_slot {
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uint16_t checksum;
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uint16_t length;
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};
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typedef struct mcp_slot mcp_slot_t;
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/* 64 Bytes */
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typedef struct
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{
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struct mcp_cmd {
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uint32_t cmd;
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uint32_t data0; /* will be low portion if data > 32 bits */
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/* 8 */
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uint32_t data1; /* will be high portion if data > 32 bits */
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uint32_t data2; /* currently unused.. */
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/* 16 */
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mcp_dma_addr_t response_addr;
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struct mcp_dma_addr response_addr;
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/* 24 */
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uint8_t pad[40];
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} mcp_cmd_t;
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};
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typedef struct mcp_cmd mcp_cmd_t;
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/* 8 Bytes */
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typedef struct
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{
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struct mcp_cmd_response {
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uint32_t data;
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uint32_t result;
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} mcp_cmd_response_t;
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};
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typedef struct mcp_cmd_response mcp_cmd_response_t;
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@ -98,111 +97,111 @@ typedef struct
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The PADDED flags is set if the packet needs to be padded, and it
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must be set for all segments.
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The MXGE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative
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The MXGEFW_FLAGS_ALIGN_ODD must be set if the cumulative
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length of all previous segments was odd.
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*/
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#define MXGE_MCP_ETHER_FLAGS_VALID 0x1
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#define MXGE_MCP_ETHER_FLAGS_FIRST 0x2
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#define MXGE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4
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#define MXGE_MCP_ETHER_FLAGS_CKSUM 0x8
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#define MXGE_MCP_ETHER_FLAGS_SMALL 0x10
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#define MXGE_MCP_ETHER_FLAGS_NOT_LAST 0x100
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#define MXGE_MCP_ETHER_FLAGS_TSO_HDR 0x200
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#define MXGE_MCP_ETHER_FLAGS_TSO 0x400
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#define MXGEFW_FLAGS_SMALL 0x1
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#define MXGEFW_FLAGS_TSO_HDR 0x1
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#define MXGEFW_FLAGS_FIRST 0x2
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#define MXGEFW_FLAGS_ALIGN_ODD 0x4
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#define MXGEFW_FLAGS_CKSUM 0x8
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#define MXGEFW_FLAGS_TSO_LAST 0x8
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#define MXGEFW_FLAGS_NO_TSO 0x10
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#define MXGEFW_FLAGS_TSO_CHOP 0x10
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#define MXGEFW_FLAGS_TSO_PLD 0x20
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#define MXGE_MCP_ETHER_SEND_SMALL_SIZE 1520
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#define MXGE_MCP_ETHER_MAX_MTU 9400
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#define MXGEFW_SEND_SMALL_SIZE 1520
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#define MXGEFW_MAX_MTU 9400
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typedef union mcp_pso_or_cumlen
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{
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union mcp_pso_or_cumlen {
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uint16_t pseudo_hdr_offset;
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uint16_t cum_len;
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} mcp_pso_or_cumlen_t;
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};
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typedef union mcp_pso_or_cumlen mcp_pso_or_cumlen_t;
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#define MXGE_MCP_ETHER_MAX_SEND_DESC 12
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#define MXGE_MCP_ETHER_PAD 2
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#define MXGEFW_MAX_SEND_DESC 12
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#define MXGEFW_PAD 2
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/* 16 Bytes */
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typedef struct
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{
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struct mcp_kreq_ether_send {
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uint32_t addr_high;
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uint32_t addr_low;
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uint16_t length;
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uint8_t pad;
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uint8_t cksum_offset; /* where to start computing cksum */
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uint16_t pseudo_hdr_offset;
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uint16_t flags; /* as defined above */
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} mcp_kreq_ether_send_t;
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uint16_t length;
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uint8_t pad;
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uint8_t rdma_count;
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uint8_t cksum_offset; /* where to start computing cksum */
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uint8_t flags; /* as defined above */
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};
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typedef struct mcp_kreq_ether_send mcp_kreq_ether_send_t;
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/* 8 Bytes */
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typedef struct
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{
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struct mcp_kreq_ether_recv {
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uint32_t addr_high;
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uint32_t addr_low;
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} mcp_kreq_ether_recv_t;
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};
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typedef struct mcp_kreq_ether_recv mcp_kreq_ether_recv_t;
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/* Commands */
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#define MXGE_MCP_CMD_OFFSET 0xf80000
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#define MXGEFW_CMD_OFFSET 0xf80000
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typedef enum {
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MXGE_MCP_CMD_NONE = 0,
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enum myri10ge_mcp_cmd_type {
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MXGEFW_CMD_NONE = 0,
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/* Reset the mcp, it is left in a safe state, waiting
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for the driver to set all its parameters */
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MXGE_MCP_CMD_RESET,
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MXGEFW_CMD_RESET,
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/* get the version number of the current firmware..
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(may be available in the eeprom strings..? */
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MXGE_MCP_GET_MCP_VERSION,
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MXGEFW_GET_MCP_VERSION,
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/* Parameters which must be set by the driver before it can
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issue MXGE_MCP_CMD_ETHERNET_UP. They persist until the next
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MXGE_MCP_CMD_RESET is issued */
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issue MXGEFW_CMD_ETHERNET_UP. They persist until the next
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MXGEFW_CMD_RESET is issued */
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MXGE_MCP_CMD_SET_INTRQ0_DMA,
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MXGE_MCP_CMD_SET_INTRQ1_DMA,
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MXGE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
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MXGE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
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MXGEFW_CMD_SET_INTRQ_DMA,
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MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
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MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
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/* Parameters which refer to lanai SRAM addresses where the
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driver must issue PIO writes for various things */
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MXGE_MCP_CMD_GET_SEND_OFFSET,
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MXGE_MCP_CMD_GET_SMALL_RX_OFFSET,
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MXGE_MCP_CMD_GET_BIG_RX_OFFSET,
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MXGE_MCP_CMD_GET_IRQ_ACK_OFFSET,
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MXGE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET,
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MXGE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET,
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MXGEFW_CMD_GET_SEND_OFFSET,
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MXGEFW_CMD_GET_SMALL_RX_OFFSET,
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MXGEFW_CMD_GET_BIG_RX_OFFSET,
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MXGEFW_CMD_GET_IRQ_ACK_OFFSET,
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MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
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/* Parameters which refer to rings stored on the MCP,
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and whose size is controlled by the mcp */
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MXGE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */
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MXGE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */
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MXGEFW_CMD_GET_SEND_RING_SIZE, /* in bytes */
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MXGEFW_CMD_GET_RX_RING_SIZE, /* in bytes */
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/* Parameters which refer to rings stored in the host,
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and whose size is controlled by the host. Note that
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all must be physically contiguous and must contain
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a power of 2 number of entries. */
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MXGE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */
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MXGEFW_CMD_SET_INTRQ_SIZE, /* in bytes */
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/* command to bring ethernet interface up. Above parameters
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(plus mtu & mac address) must have been exchanged prior
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to issuing this command */
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MXGE_MCP_CMD_ETHERNET_UP,
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MXGEFW_CMD_ETHERNET_UP,
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/* command to bring ethernet interface down. No further sends
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or receives may be processed until an MXGE_MCP_CMD_ETHERNET_UP
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or receives may be processed until an MXGEFW_CMD_ETHERNET_UP
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is issued, and all interrupt queues must be flushed prior
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to ack'ing this command */
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MXGE_MCP_CMD_ETHERNET_DOWN,
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MXGEFW_CMD_ETHERNET_DOWN,
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/* commands the driver may issue live, without resetting
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the nic. Note that increasing the mtu "live" should
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@ -210,46 +209,46 @@ typedef enum {
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sufficiently large to handle the new mtu. Decreasing
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the mtu live is safe */
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MXGE_MCP_CMD_SET_MTU,
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MXGE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */
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MXGE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */
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MXGE_MCP_CMD_SET_STATS_DMA,
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MXGEFW_CMD_SET_MTU,
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MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, /* in microseconds */
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MXGEFW_CMD_SET_STATS_INTERVAL, /* in microseconds */
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MXGEFW_CMD_SET_STATS_DMA,
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MXGE_MCP_ENABLE_PROMISC,
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MXGE_MCP_DISABLE_PROMISC,
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MXGE_MCP_SET_MAC_ADDRESS,
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MXGEFW_ENABLE_PROMISC,
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MXGEFW_DISABLE_PROMISC,
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MXGEFW_SET_MAC_ADDRESS,
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MXGE_MCP_ENABLE_FLOW_CONTROL,
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MXGE_MCP_DISABLE_FLOW_CONTROL
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} mxge_mcp_cmd_type_t;
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MXGEFW_ENABLE_FLOW_CONTROL,
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MXGEFW_DISABLE_FLOW_CONTROL,
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/* do a DMA test
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data0,data1 = DMA address
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data2 = RDMA length (MSH), WDMA length (LSH)
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command return data = repetitions (MSH), 0.5-ms ticks (LSH)
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*/
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MXGEFW_DMA_TEST
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};
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typedef enum myri10ge_mcp_cmd_type myri10ge_mcp_cmd_type_t;
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typedef enum {
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MXGE_MCP_CMD_OK = 0,
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MXGE_MCP_CMD_UNKNOWN,
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MXGE_MCP_CMD_ERROR_RANGE,
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MXGE_MCP_CMD_ERROR_BUSY,
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MXGE_MCP_CMD_ERROR_EMPTY,
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MXGE_MCP_CMD_ERROR_CLOSED,
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MXGE_MCP_CMD_ERROR_HASH_ERROR,
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MXGE_MCP_CMD_ERROR_BAD_PORT,
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MXGE_MCP_CMD_ERROR_RESOURCES
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} mxge_mcp_cmd_status_t;
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typedef enum {
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MXGE_MCP_INTR_NONE = 0,
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MXGE_MCP_INTR_ETHER_SEND_DONE,
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MXGE_MCP_INTR_ETHER_RECV_SMALL,
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MXGE_MCP_INTR_ETHER_RECV_BIG,
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MXGE_MCP_INTR_LINK_CHANGE,
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MXGE_MCP_INTR_STATS_UPDATE,
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MXGE_MCP_INTR_ETHER_DOWN
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} mxge_mcp_intr_type_t;
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enum myri10ge_mcp_cmd_status {
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MXGEFW_CMD_OK = 0,
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MXGEFW_CMD_UNKNOWN,
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MXGEFW_CMD_ERROR_RANGE,
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MXGEFW_CMD_ERROR_BUSY,
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MXGEFW_CMD_ERROR_EMPTY,
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MXGEFW_CMD_ERROR_CLOSED,
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MXGEFW_CMD_ERROR_HASH_ERROR,
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MXGEFW_CMD_ERROR_BAD_PORT,
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MXGEFW_CMD_ERROR_RESOURCES
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};
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typedef enum myri10ge_mcp_cmd_status myri10ge_mcp_cmd_status_t;
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/* 32 Bytes */
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typedef struct
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{
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/* 40 Bytes */
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struct mcp_irq_data {
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uint32_t send_done_count;
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uint32_t link_up;
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uint32_t dropped_link_overflow;
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uint32_t dropped_link_error_or_filtered;
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@ -257,9 +256,14 @@ typedef struct
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uint32_t dropped_overrun;
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||||
uint32_t dropped_no_small_buffer;
|
||||
uint32_t dropped_no_big_buffer;
|
||||
uint32_t dropped_interrupt_busy;
|
||||
uint32_t rdma_tags_available;
|
||||
} mcp_stats_t;
|
||||
|
||||
uint8_t tx_stopped;
|
||||
uint8_t link_down;
|
||||
uint8_t stats_updated;
|
||||
uint8_t valid;
|
||||
};
|
||||
typedef struct mcp_irq_data mcp_irq_data_t;
|
||||
|
||||
|
||||
#endif /* _mxge_mcp_h */
|
||||
#endif /* _myri10ge_mcp_h */
|
||||
|
Loading…
Reference in New Issue
Block a user