Refresh CPU types and classes from sys/sys/pmc.h.
While here, fix a few nits. Inspired by reviewing D35342. Sources for trademark info - https://www.arm.com/company/policies/trademarks (no Arm8, curiously) - https://www.ibm.com/legal/copytrade?mhsrc=ibmsearch_a&mhq=trademark Reviewed by: carlavilla, luporl, mhorne Approved by: carlavilla (mentor), mhorne (src) Differential Revision: https://reviews.freebsd.org/D35344
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@ -23,7 +23,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd May 28, 2022
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.Dd June 3, 2022
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.Dt PMC 3
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.Os
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.Sh NAME
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@ -131,7 +131,7 @@ The CPUs known to the PMC library are named by the
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enumeration.
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Supported CPUs include:
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.Pp
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.Bl -tag -width "Li PMC_CPU_INTEL_CORE2" -compact
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.Bl -tag -width "Li PMC_CPU_ARMV7_CORTEX_A15" -compact
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.It Li PMC_CPU_AMD_K7
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.Tn "AMD Athlon"
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CPUs.
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@ -161,14 +161,66 @@ and
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CPUs, and other CPUs conforming to version 2 of the
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.Tn Intel
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performance measurement architecture.
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.It Li PMC_CPU_PPC_7450
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.Tn PowerPC
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MPC7450 CPUs.
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.It Li PMC_CPU_PPC_E500
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.Tn PowerPC
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e500 Core CPUs.
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.It Li PMC_CPU_PPC_970
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.Tn IBM
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.Tn PowerPC
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970 CPUs.
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.It Li PMC_CPU_PPC_POWER8
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.Tn IBM
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.Tn POWER8 and
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.Tn POWER9
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CPUs.
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.It Li GENERIC
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Generic
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.It Li PMC_CPU_ARMV7_CORTEX_A5
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.Tn ARMv7
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.Tn Cortex A5
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CPUs.
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.It Li PMC_CPU_ARMV7_CORTEX_A7
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.Tn ARMv7
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.Tn Cortex A7
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CPUs.
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.It Li PMC_CPU_ARMV7_CORTEX_A8
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.Tn ARMv7
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.Tn Cortex A8
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CPUs.
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.It Li PMC_CPU_ARMV7_CORTEX_A9
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.Tn ARMv7
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.Tn Cortex A9
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CPUs.
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.It Li PMC_CPU_ARMV7_CORTEX_A15
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.Tn ARMv7 Cortex A15
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CPUs.
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.It Li PMC_CPU_ARMV7_CORTEX_A17
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.Tn ARMv7
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.Tn Cortex A17
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CPUs.
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.It Li PMC_CPU_ARMV8_CORTEX_A53
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ARMv8
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.Tn Cortex A53
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CPUs.
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.It Li PMC_CPU_ARMV8_CORTEX_A57
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ARMv8
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.Tn Cortex A57
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CPUs.
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.It Li PMC_CPU_ARMV8_CORTEX_A76
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ARMv8
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.Tn Cortex A76
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CPUs.
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.El
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.Ss Supported PMCs
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PMC supported by this library are named by the
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PMCs supported by this library are named by the
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.Vt enum pmc_class
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enumeration.
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Supported PMC kinds include:
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Supported PMC classes include:
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.Pp
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.Bl -tag -width "Li PMC_CLASS_IAF" -compact
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.Bl -tag -width "Li PMC_CLASS_POWER8" -compact
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.It Li PMC_CLASS_IAF
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Fixed function hardware counters presents in CPUs conforming to the
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.Tn Intel
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@ -187,6 +239,18 @@ Programmable hardware counters present in
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CPUs.
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.It Li PMC_CLASS_TSC
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The timestamp counter on i386 and amd64 architecture CPUs.
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.It Li PMC_CLASS_ARMV7
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.Tn ARMv7
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.It Li PMC_CLASS_ARMV8
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.Tn ARMv8
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.It Li PMC_CLASS_PPC970
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.Tn IBM
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.Tn PowerPC
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970 class.
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.It Li PMC_CLASS_POWER8
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.Tn IBM
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.Tn POWER8
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class.
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.It Li PMC_CLASS_SOFT
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Software events.
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.El
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@ -361,10 +425,10 @@ driver will send a PMC owning process a
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signal if:
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.Bl -bullet
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.It
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If any process-mode PMC allocated by it loses all its
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any process-mode PMC allocated by it loses all its
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target processes.
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.It
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If the driver encounters an error when writing log data to a
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the driver encounters an error when writing log data to a
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configured log file.
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This error may be retrieved by a subsequent call to
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.Fn pmc_flush_logfile .
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@ -409,7 +473,7 @@ and process scope PMCs are detached from their targets using
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function
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.Fn pmc_detach .
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.It
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Before the process exits, its may release its PMCs using function
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Before the process exits, it may release its PMCs using function
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.Fn pmc_release .
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Any configured log file may be closed using function
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.Fn pmc_configure_logfile .
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