d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Change the default MSR values used when starting userland and kernel

Browse Source 
threads from compile-time defines to global variables. This removes a
significant amount of duplicated runtime patches to the compile-time
defines, centralizing the conditional logic in the early startup code.

Reviewed by:	jhibbits
This commit is contained in:
Nathan Whitehorn 2018-02-01 05:31:24 +00:00
parent 564ac41556
commit 619282986d
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=328651
8 changed files with 55 additions and 56 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
sys/powerpc/aim/aim_machdep.c
View File

@ -178,6 +178,27 @@ aim_cpu_init(vm_offset_t toc)
trap_offset = 0;
cacheline_warn = 0;
/* General setup for AIM CPUs */
psl_kernset = PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI;
#ifdef __powerpc64__
psl_kernset |= PSL_SF;
if (mfmsr() & PSL_HV)
psl_kernset |= PSL_HV;
#endif
psl_userset = psl_kernset | PSL_PR;
#ifdef __powerpc64__
psl_userset32 = psl_userset & ~PSL_SF;
#endif
/* Bits that users aren't allowed to change */
psl_userstatic = ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1);
/*
* Mask bits from the SRR1 that aren't really the MSR:
* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64)
*/
psl_userstatic &= ~0x783f0000UL;
/* Various very early CPU fix ups */
switch (mfpvr() >> 16) {
/*

2
sys/powerpc/aim/mp_cpudep.c
View File

@ -111,7 +111,7 @@ cpudep_ap_bootstrap(void)
{
register_t msr, sp;
msr = PSL_KERNSET & ~PSL_EE;
msr = psl_kernset & ~PSL_EE;
mtmsr(msr);
pcpup->pc_curthread = pcpup->pc_idlethread;

10
sys/powerpc/booke/booke_machdep.c
View File

@ -210,6 +210,16 @@ booke_cpu_init(void)
cpu_features |= PPC_FEATURE_BOOKE;
psl_kernset = PSL_CE | PSL_ME | PSL_EE;
#ifdef __powerpc64__
psl_kernset |= PSL_CM;
#endif
psl_userset = psl_kernset | PSL_PR;
#ifdef __powerpc64__
psl_userset32 = psl_kernset & ~PSL_CM;
#endif
psl_userstatic = ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1);
pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC);
}

25
sys/powerpc/include/psl.h
View File

@ -90,28 +90,13 @@
#define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */
#define PSL_FE_DFLT PSL_FE_DIS /* default == none */
#if defined(BOOKE_E500)
/* Initial kernel MSR, use IS=1 ad DS=1. */
#define PSL_KERNSET_INIT (PSL_IS | PSL_DS)
#ifndef LOCORE
extern register_t psl_kernset; /* Default MSR values for kernel */
extern register_t psl_userset; /* Default MSR values for userland */
#ifdef __powerpc64__
#define PSL_KERNSET (PSL_CM | PSL_CE | PSL_ME | PSL_EE)
#else
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE)
extern register_t psl_userset32; /* Default user MSR values for 32-bit */
#endif
#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
#elif defined(BOOKE_PPC4XX)
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP)
#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
#elif defined(AIM)
#ifdef __powerpc64__
#define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#else
#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */
#endif
#define PSL_SRR1_MASK 0x783f0000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
#endif
#define PSL_USERSET (PSL_KERNSET | PSL_PR)
#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK)
#endif /* _MACHINE_PSL_H_ */

34
sys/powerpc/powerpc/exec_machdep.c
View File

@ -454,7 +454,7 @@ set_mcontext(struct thread *td, mcontext_t *mcp)
/*
* Don't let the user set privileged MSR bits
*/
if ((mcp->mc_srr1 & PSL_USERSTATIC) != (tf->srr1 & PSL_USERSTATIC)) {
if ((mcp->mc_srr1 & psl_userstatic) != (tf->srr1 & psl_userstatic)) {
return (EINVAL);
}
@ -538,16 +538,8 @@ exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
tf->srr0 = imgp->entry_addr;
#ifdef __powerpc64__
tf->fixreg[12] = imgp->entry_addr;
#ifdef AIM
tf->srr1 = PSL_SF | PSL_USERSET | PSL_FE_DFLT;
if (mfmsr() & PSL_HV)
tf->srr1 |= PSL_HV;
#elif defined(BOOKE)
tf->srr1 = PSL_CM | PSL_USERSET | PSL_FE_DFLT;
#endif
#else
tf->srr1 = PSL_USERSET | PSL_FE_DFLT;
#endif
tf->srr1 = psl_userset | PSL_FE_DFLT;
td->td_pcb->pcb_flags = 0;
}
@ -572,14 +564,7 @@ ppc32_setregs(struct thread *td, struct image_params *imgp, u_long stack)
tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */
tf->srr0 = imgp->entry_addr;
tf->srr1 = PSL_USERSET | PSL_FE_DFLT;
#ifdef AIM
tf->srr1 &= ~PSL_SF;
if (mfmsr() & PSL_HV)
tf->srr1 |= PSL_HV;
#elif defined(BOOKE)
tf->srr1 &= ~PSL_CM;
#endif
tf->srr1 = psl_userset32 | PSL_FE_DFLT;
td->td_pcb->pcb_flags = 0;
}
#endif
@ -990,7 +975,7 @@ cpu_copy_thread(struct thread *td, struct thread *td0)
/* Setup to release spin count in fork_exit(). */
td->td_md.md_spinlock_count = 1;
td->td_md.md_saved_msr = PSL_KERNSET;
td->td_md.md_saved_msr = psl_kernset;
}
void
@ -1015,9 +1000,10 @@ cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
tf->fixreg[3] = (register_t)arg;
if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
tf->srr0 = (register_t)entry;
tf->srr1 = PSL_USERSET | PSL_FE_DFLT;
#ifdef __powerpc64__
tf->srr1 &= ~PSL_SF;
tf->srr1 = psl_userset32 | PSL_FE_DFLT;
#else
tf->srr1 = psl_userset | PSL_FE_DFLT;
#endif
} else {
#ifdef __powerpc64__
@ -1026,14 +1012,10 @@ cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
tf->srr0 = entry_desc[0];
tf->fixreg[2] = entry_desc[1];
tf->fixreg[11] = entry_desc[2];
tf->srr1 = PSL_SF | PSL_USERSET | PSL_FE_DFLT;
tf->srr1 = psl_userset | PSL_FE_DFLT;
#endif
}
#ifdef __powerpc64__
if (mfmsr() & PSL_HV)
tf->srr1 |= PSL_HV;
#endif
td->td_pcb->pcb_flags = 0;
td->td_retval[0] = (register_t)entry;

7
sys/powerpc/powerpc/genassym.c
View File

@ -236,10 +236,6 @@ ASSYM(PSL_UCLE, PSL_UCLE);
ASSYM(PSL_WE, PSL_WE);
ASSYM(PSL_UBLE, PSL_UBLE);
#if defined(BOOKE_E500)
ASSYM(PSL_KERNSET_INIT, PSL_KERNSET_INIT);
#endif
#if defined(AIM) && defined(__powerpc64__)
ASSYM(PSL_SF, PSL_SF);
ASSYM(PSL_HV, PSL_HV);
@ -268,7 +264,4 @@ ASSYM(PSL_FP, PSL_FP);
ASSYM(PSL_ME, PSL_ME);
ASSYM(PSL_PR, PSL_PR);
ASSYM(PSL_PMM, PSL_PMM);
ASSYM(PSL_KERNSET, PSL_KERNSET);
ASSYM(PSL_USERSET, PSL_USERSET);
ASSYM(PSL_USERSTATIC, PSL_USERSTATIC);

10
sys/powerpc/powerpc/machdep.c
View File

@ -160,6 +160,14 @@ uintptr_t powerpc_init(vm_offset_t, vm_offset_t, vm_offset_t, void *,
long Maxmem = 0;
long realmem = 0;
/* Default MSR values set in the AIM/Book-E early startup code */
register_t psl_kernset;
register_t psl_userset;
register_t psl_userstatic;
#ifdef __powerpc64__
register_t psl_userset32;
#endif
struct kva_md_info kmi;
static void
@ -380,7 +388,7 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp,
* Bring up MMU
*/
pmap_bootstrap(startkernel, endkernel);
mtmsr(PSL_KERNSET & ~PSL_EE);
mtmsr(psl_kernset & ~PSL_EE);
/*
* Initialize params/tunables that are derived from memsize

2
sys/powerpc/powerpc/vm_machdep.c
View File

@ -167,7 +167,7 @@ cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags)
/* Setup to release spin count in fork_exit(). */
td2->td_md.md_spinlock_count = 1;
td2->td_md.md_saved_msr = PSL_KERNSET;
td2->td_md.md_saved_msr = psl_kernset;
/*
* Now cpu_switch() can schedule the new process.