Change the default MSR values used when starting userland and kernel
threads from compile-time defines to global variables. This removes a significant amount of duplicated runtime patches to the compile-time defines, centralizing the conditional logic in the early startup code. Reviewed by: jhibbits
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564ac41556
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619282986d
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=328651
@ -178,6 +178,27 @@ aim_cpu_init(vm_offset_t toc)
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trap_offset = 0;
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cacheline_warn = 0;
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/* General setup for AIM CPUs */
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psl_kernset = PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI;
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#ifdef __powerpc64__
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psl_kernset |= PSL_SF;
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if (mfmsr() & PSL_HV)
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psl_kernset |= PSL_HV;
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#endif
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psl_userset = psl_kernset | PSL_PR;
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#ifdef __powerpc64__
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psl_userset32 = psl_userset & ~PSL_SF;
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#endif
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/* Bits that users aren't allowed to change */
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psl_userstatic = ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1);
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/*
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* Mask bits from the SRR1 that aren't really the MSR:
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* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64)
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*/
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psl_userstatic &= ~0x783f0000UL;
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/* Various very early CPU fix ups */
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switch (mfpvr() >> 16) {
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/*
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@ -111,7 +111,7 @@ cpudep_ap_bootstrap(void)
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{
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register_t msr, sp;
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msr = PSL_KERNSET & ~PSL_EE;
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msr = psl_kernset & ~PSL_EE;
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mtmsr(msr);
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pcpup->pc_curthread = pcpup->pc_idlethread;
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@ -210,6 +210,16 @@ booke_cpu_init(void)
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cpu_features |= PPC_FEATURE_BOOKE;
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psl_kernset = PSL_CE | PSL_ME | PSL_EE;
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#ifdef __powerpc64__
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psl_kernset |= PSL_CM;
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#endif
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psl_userset = psl_kernset | PSL_PR;
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#ifdef __powerpc64__
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psl_userset32 = psl_kernset & ~PSL_CM;
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#endif
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psl_userstatic = ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1);
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pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC);
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}
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@ -90,28 +90,13 @@
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#define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */
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#define PSL_FE_DFLT PSL_FE_DIS /* default == none */
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#if defined(BOOKE_E500)
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/* Initial kernel MSR, use IS=1 ad DS=1. */
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#define PSL_KERNSET_INIT (PSL_IS | PSL_DS)
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#ifndef LOCORE
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extern register_t psl_kernset; /* Default MSR values for kernel */
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extern register_t psl_userset; /* Default MSR values for userland */
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#ifdef __powerpc64__
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#define PSL_KERNSET (PSL_CM | PSL_CE | PSL_ME | PSL_EE)
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#else
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#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE)
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extern register_t psl_userset32; /* Default user MSR values for 32-bit */
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#endif
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#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
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#elif defined(BOOKE_PPC4XX)
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#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP)
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#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
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#elif defined(AIM)
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#ifdef __powerpc64__
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#define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
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#else
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#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
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extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */
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#endif
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#define PSL_SRR1_MASK 0x783f0000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
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#endif
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#define PSL_USERSET (PSL_KERNSET | PSL_PR)
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#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK)
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#endif /* _MACHINE_PSL_H_ */
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@ -454,7 +454,7 @@ set_mcontext(struct thread *td, mcontext_t *mcp)
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/*
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* Don't let the user set privileged MSR bits
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*/
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if ((mcp->mc_srr1 & PSL_USERSTATIC) != (tf->srr1 & PSL_USERSTATIC)) {
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if ((mcp->mc_srr1 & psl_userstatic) != (tf->srr1 & psl_userstatic)) {
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return (EINVAL);
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}
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@ -538,16 +538,8 @@ exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
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tf->srr0 = imgp->entry_addr;
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#ifdef __powerpc64__
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tf->fixreg[12] = imgp->entry_addr;
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#ifdef AIM
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tf->srr1 = PSL_SF | PSL_USERSET | PSL_FE_DFLT;
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if (mfmsr() & PSL_HV)
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tf->srr1 |= PSL_HV;
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#elif defined(BOOKE)
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tf->srr1 = PSL_CM | PSL_USERSET | PSL_FE_DFLT;
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#endif
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#else
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tf->srr1 = PSL_USERSET | PSL_FE_DFLT;
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#endif
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tf->srr1 = psl_userset | PSL_FE_DFLT;
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td->td_pcb->pcb_flags = 0;
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}
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@ -572,14 +564,7 @@ ppc32_setregs(struct thread *td, struct image_params *imgp, u_long stack)
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tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */
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tf->srr0 = imgp->entry_addr;
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tf->srr1 = PSL_USERSET | PSL_FE_DFLT;
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#ifdef AIM
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tf->srr1 &= ~PSL_SF;
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if (mfmsr() & PSL_HV)
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tf->srr1 |= PSL_HV;
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#elif defined(BOOKE)
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tf->srr1 &= ~PSL_CM;
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#endif
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tf->srr1 = psl_userset32 | PSL_FE_DFLT;
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td->td_pcb->pcb_flags = 0;
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}
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#endif
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@ -990,7 +975,7 @@ cpu_copy_thread(struct thread *td, struct thread *td0)
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/* Setup to release spin count in fork_exit(). */
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td->td_md.md_spinlock_count = 1;
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td->td_md.md_saved_msr = PSL_KERNSET;
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td->td_md.md_saved_msr = psl_kernset;
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}
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void
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@ -1015,9 +1000,10 @@ cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
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tf->fixreg[3] = (register_t)arg;
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if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
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tf->srr0 = (register_t)entry;
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tf->srr1 = PSL_USERSET | PSL_FE_DFLT;
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#ifdef __powerpc64__
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tf->srr1 &= ~PSL_SF;
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tf->srr1 = psl_userset32 | PSL_FE_DFLT;
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#else
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tf->srr1 = psl_userset | PSL_FE_DFLT;
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#endif
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} else {
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#ifdef __powerpc64__
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@ -1026,14 +1012,10 @@ cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
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tf->srr0 = entry_desc[0];
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tf->fixreg[2] = entry_desc[1];
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tf->fixreg[11] = entry_desc[2];
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tf->srr1 = PSL_SF | PSL_USERSET | PSL_FE_DFLT;
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tf->srr1 = psl_userset | PSL_FE_DFLT;
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#endif
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}
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#ifdef __powerpc64__
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if (mfmsr() & PSL_HV)
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tf->srr1 |= PSL_HV;
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#endif
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td->td_pcb->pcb_flags = 0;
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td->td_retval[0] = (register_t)entry;
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@ -236,10 +236,6 @@ ASSYM(PSL_UCLE, PSL_UCLE);
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ASSYM(PSL_WE, PSL_WE);
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ASSYM(PSL_UBLE, PSL_UBLE);
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#if defined(BOOKE_E500)
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ASSYM(PSL_KERNSET_INIT, PSL_KERNSET_INIT);
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#endif
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#if defined(AIM) && defined(__powerpc64__)
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ASSYM(PSL_SF, PSL_SF);
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ASSYM(PSL_HV, PSL_HV);
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@ -268,7 +264,4 @@ ASSYM(PSL_FP, PSL_FP);
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ASSYM(PSL_ME, PSL_ME);
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ASSYM(PSL_PR, PSL_PR);
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ASSYM(PSL_PMM, PSL_PMM);
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ASSYM(PSL_KERNSET, PSL_KERNSET);
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ASSYM(PSL_USERSET, PSL_USERSET);
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ASSYM(PSL_USERSTATIC, PSL_USERSTATIC);
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@ -160,6 +160,14 @@ uintptr_t powerpc_init(vm_offset_t, vm_offset_t, vm_offset_t, void *,
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long Maxmem = 0;
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long realmem = 0;
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/* Default MSR values set in the AIM/Book-E early startup code */
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register_t psl_kernset;
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register_t psl_userset;
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register_t psl_userstatic;
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#ifdef __powerpc64__
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register_t psl_userset32;
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#endif
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struct kva_md_info kmi;
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static void
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@ -380,7 +388,7 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp,
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* Bring up MMU
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*/
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pmap_bootstrap(startkernel, endkernel);
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mtmsr(PSL_KERNSET & ~PSL_EE);
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mtmsr(psl_kernset & ~PSL_EE);
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/*
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* Initialize params/tunables that are derived from memsize
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@ -167,7 +167,7 @@ cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags)
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/* Setup to release spin count in fork_exit(). */
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td2->td_md.md_spinlock_count = 1;
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td2->td_md.md_saved_msr = PSL_KERNSET;
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td2->td_md.md_saved_msr = psl_kernset;
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/*
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* Now cpu_switch() can schedule the new process.
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