Remove redundant cache initialization in JZ4780 SMP startup code
This was done out of pure paranoia when hunting for bugs in cache and is not really required.
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284829482e
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631f432b0d
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=311463
@ -27,36 +27,19 @@
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*/
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#include <machine/asm.h>
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#include <machine/cpu.h>
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#include <machine/cpuregs.h>
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#include <machine/cache_r4k.h>
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#include "assym.s"
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#define CACHE_SIZE (32 * 1024)
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#define CACHE_LINESIZE 32
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.text
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.set noat
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.set noreorder
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.section .text.mpentry_jz4780
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.balign 0x10000
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/*
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* JZ4870 has stricter alignment requirement for
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* CPU entry point. Enforce it in CPU-specific
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* file.
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*/
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GLOBAL(jz4780_mpentry)
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/* Initialize caches */
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li t0, MIPS_KSEG0_START
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ori t1, t0, CACHE_SIZE
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mtc0 zero, MIPS_COP_0_TAG_LO
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COP0_SYNC
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1: cache CACHEOP_R4K_INDEX_STORE_TAG | CACHE_R4K_I, 0(t0)
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cache CACHEOP_R4K_INDEX_STORE_TAG | CACHE_R4K_D, 0(t0)
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bne t0, t1, 1b
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addiu t0, t0, CACHE_LINESIZE
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/* Set TLB page mask */
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mtc0 zero, MIPS_COP_0_TLB_PG_MASK
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COP0_SYNC
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j mpentry
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nop
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