Pack several boolean fields into single bge_flags field.
This commit is contained in:
parent
6599d1e129
commit
652ae483f8
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=161546
@ -683,7 +683,7 @@ bge_newbuf_std(struct bge_softc *sc, int i, struct mbuf *m)
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m_new->m_data = m_new->m_ext.ext_buf;
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}
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if (!sc->bge_rx_alignment_bug)
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if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0)
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m_adj(m_new, ETHER_ALIGN);
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sc->bge_cdata.bge_rx_std_chain[i] = m_new;
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r = &sc->bge_ldata.bge_rx_std_ring[i];
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@ -742,7 +742,7 @@ bge_newbuf_jumbo(struct bge_softc *sc, int i, struct mbuf *m)
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m_new->m_data = m_new->m_ext.ext_buf;
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}
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if (!sc->bge_rx_alignment_bug)
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if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0)
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m_adj(m_new, ETHER_ALIGN);
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error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag_jumbo,
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@ -1005,12 +1005,12 @@ bge_chipinit(struct bge_softc *sc)
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BGE_MEMWIN_WRITE(sc, i, 0);
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/* Set up the PCI DMA control register. */
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if (sc->bge_pcie) {
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if (sc->bge_flags & BGE_FLAG_PCIE) {
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/* PCI Express bus */
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dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
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(0xf << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
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(0x2 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
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} else if (sc->bge_pcix) {
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} else if (sc->bge_flags & BGE_FLAG_PCIX) {
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/* PCI-X bus */
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if (BGE_IS_5714_FAMILY(sc)) {
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dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD;
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@ -1111,7 +1111,7 @@ bge_blockinit(struct bge_softc *sc)
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if (!(BGE_IS_5705_OR_BEYOND(sc))) {
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/* Configure mbuf memory pool */
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if (sc->bge_extram) {
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if (sc->bge_flags & BGE_FLAG_EXTRAM) {
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CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR,
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BGE_EXT_SSRAM);
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if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
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@ -1195,7 +1195,7 @@ bge_blockinit(struct bge_softc *sc)
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else
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rcb->bge_maxlen_flags =
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BGE_RCB_MAXLEN_FLAGS(BGE_MAX_FRAMELEN, 0);
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if (sc->bge_extram)
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if (sc->bge_flags & BGE_FLAG_EXTRAM)
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rcb->bge_nicaddr = BGE_EXT_STD_RX_RINGS;
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else
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rcb->bge_nicaddr = BGE_STD_RX_RINGS;
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@ -1224,7 +1224,7 @@ bge_blockinit(struct bge_softc *sc)
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BUS_DMASYNC_PREREAD);
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rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0,
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BGE_RCB_FLAG_USE_EXT_RX_BD|BGE_RCB_FLAG_RING_DISABLED);
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if (sc->bge_extram)
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if (sc->bge_flags & BGE_FLAG_EXTRAM)
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rcb->bge_nicaddr = BGE_EXT_JUMBO_RX_RINGS;
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else
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rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS;
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@ -1402,7 +1402,8 @@ bge_blockinit(struct bge_softc *sc)
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BGE_MACMODE_RXDMA_ENB|BGE_MACMODE_RX_STATS_CLEAR|
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BGE_MACMODE_TX_STATS_CLEAR|BGE_MACMODE_RX_STATS_ENB|
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BGE_MACMODE_TX_STATS_ENB|BGE_MACMODE_FRMHDR_DMA_ENB|
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(sc->bge_tbi ? BGE_PORTMODE_TBI : BGE_PORTMODE_MII));
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((sc->bge_flags & BGE_FLAG_TBI) ?
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BGE_PORTMODE_TBI : BGE_PORTMODE_MII));
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/* Set misc. local control, enable interrupts on attentions */
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CSR_WRITE_4(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_ONATTN);
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@ -1466,7 +1467,7 @@ bge_blockinit(struct bge_softc *sc)
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CSR_WRITE_4(sc, BGE_MI_STS, 0);
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/* Enable PHY auto polling (for MII/GMII only) */
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if (sc->bge_tbi) {
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if (sc->bge_flags & BGE_FLAG_TBI) {
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CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK);
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} else {
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BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL|10<<16);
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@ -1565,7 +1566,7 @@ bge_probe(device_t dev)
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v->v_name, br->br_name, id);
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device_set_desc_copy(dev, buf);
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if (pci_get_subvendor(dev) == DELL_VENDORID)
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sc->bge_no_3_led = 1;
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sc->bge_flags |= BGE_FLAG_NO3LED;
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return (0);
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}
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t++;
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@ -2045,7 +2046,7 @@ bge_attach(device_t dev)
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if (((v >> 8) & 0xff) == BGE_PCIE_CAPID_REG) {
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v = pci_read_config(dev, BGE_PCIE_CAPID_REG, 4);
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if ((v & 0xff) == BGE_PCIE_CAPID)
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sc->bge_pcie = 1;
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sc->bge_flags |= BGE_FLAG_PCIE;
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}
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}
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@ -2054,7 +2055,7 @@ bge_attach(device_t dev)
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*/
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if ((pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) &
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BGE_PCISTATE_PCI_BUSMODE) == 0)
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sc->bge_pcix = 1;
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sc->bge_flags |= BGE_FLAG_PCIX;
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/* Try to reset the chip. */
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bge_reset(sc);
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@ -2167,13 +2168,13 @@ bge_attach(device_t dev)
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}
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if ((hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER)
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sc->bge_tbi = 1;
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sc->bge_flags |= BGE_FLAG_TBI;
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/* The SysKonnect SK-9D41 is a 1000baseSX card. */
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if ((pci_read_config(dev, BGE_PCI_SUBSYS, 4) >> 16) == SK_SUBSYSID_9D41)
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sc->bge_tbi = 1;
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sc->bge_flags |= BGE_FLAG_TBI;
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if (sc->bge_tbi) {
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if (sc->bge_flags & BGE_FLAG_TBI) {
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ifmedia_init(&sc->bge_ifmedia, IFM_IMASK,
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bge_ifmedia_upd, bge_ifmedia_sts);
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ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);
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@ -2203,8 +2204,9 @@ bge_attach(device_t dev)
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* which do not support unaligned accesses, we will realign the
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* payloads by copying the received packets.
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*/
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if (sc->bge_asicrev == BGE_ASICREV_BCM5701 && sc->bge_pcix)
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sc->bge_rx_alignment_bug = 1;
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if (sc->bge_asicrev == BGE_ASICREV_BCM5701 &&
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sc->bge_flags & BGE_FLAG_PCIX)
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sc->bge_flags |= BGE_FLAG_RX_ALIGNBUG;
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/*
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* Call MI attach routine.
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@ -2248,7 +2250,7 @@ bge_detach(device_t dev)
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ether_ifdetach(ifp);
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if (sc->bge_tbi) {
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if (sc->bge_flags & BGE_FLAG_TBI) {
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ifmedia_removeall(&sc->bge_ifmedia);
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} else {
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bus_generic_detach(dev);
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@ -2313,7 +2315,7 @@ bge_reset(struct bge_softc *sc)
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reset = BGE_MISCCFG_RESET_CORE_CLOCKS|(65<<1);
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/* XXX: Broadcom Linux driver. */
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if (sc->bge_pcie) {
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if (sc->bge_flags & BGE_FLAG_PCIE) {
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if (CSR_READ_4(sc, 0x7e2c) == 0x60) /* PCIE 1.0 */
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CSR_WRITE_4(sc, 0x7e2c, 0x20);
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if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
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@ -2329,7 +2331,7 @@ bge_reset(struct bge_softc *sc)
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DELAY(1000);
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/* XXX: Broadcom Linux driver. */
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if (sc->bge_pcie) {
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if (sc->bge_flags & BGE_FLAG_PCIE) {
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if (sc->bge_chipid == BGE_CHIPID_BCM5750_A0) {
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uint32_t v;
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@ -2406,15 +2408,18 @@ bge_reset(struct bge_softc *sc)
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* adjustment to insure the SERDES drive level is set
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* to 1.2V.
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*/
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if (sc->bge_asicrev == BGE_ASICREV_BCM5704 && sc->bge_tbi) {
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if (sc->bge_asicrev == BGE_ASICREV_BCM5704 &&
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sc->bge_flags & BGE_FLAG_TBI) {
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uint32_t serdescfg;
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serdescfg = CSR_READ_4(sc, BGE_SERDES_CFG);
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serdescfg = (serdescfg & ~0xFFF) | 0x880;
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CSR_WRITE_4(sc, BGE_SERDES_CFG, serdescfg);
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}
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/* XXX: Broadcom Linux driver. */
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if (sc->bge_pcie && sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
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if (sc->bge_flags & BGE_FLAG_PCIE &&
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sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
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uint32_t v;
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v = CSR_READ_4(sc, 0x7c00);
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@ -2532,7 +2537,7 @@ bge_rxeof(struct bge_softc *sc)
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* For architectures with strict alignment we must make sure
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* the payload is aligned.
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*/
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if (sc->bge_rx_alignment_bug) {
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if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) {
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bcopy(m->m_data, m->m_data + ETHER_ALIGN,
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cur_rx->bge_len);
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m->m_data += ETHER_ALIGN;
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@ -2663,7 +2668,7 @@ bge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
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if (cmd == POLL_AND_CHECK_STATUS)
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if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
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sc->bge_chipid != BGE_CHIPID_BCM5700_B2) ||
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sc->bge_link_evt || sc->bge_tbi)
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sc->bge_link_evt || (sc->bge_flags & BGE_FLAG_TBI))
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bge_link_upd(sc);
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sc->rxcycles = count;
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@ -2745,7 +2750,7 @@ bge_tick_locked(struct bge_softc *sc)
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else
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bge_stats_update(sc);
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if (!sc->bge_tbi) {
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if ((sc->bge_flags & BGE_FLAG_TBI) == 0) {
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mii = device_get_softc(sc->bge_miibus);
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mii_tick(mii);
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} else {
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@ -3233,7 +3238,7 @@ bge_ifmedia_upd(struct ifnet *ifp)
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ifm = &sc->bge_ifmedia;
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/* If this is a 1000baseX NIC, enable the TBI port. */
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if (sc->bge_tbi) {
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if (sc->bge_flags & BGE_FLAG_TBI) {
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if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
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return (EINVAL);
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switch(IFM_SUBTYPE(ifm->ifm_media)) {
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@ -3296,7 +3301,7 @@ bge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
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sc = ifp->if_softc;
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if (sc->bge_tbi) {
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if (sc->bge_flags & BGE_FLAG_TBI) {
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ifmr->ifm_status = IFM_AVALID;
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ifmr->ifm_active = IFM_ETHER;
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if (CSR_READ_4(sc, BGE_MAC_STS) &
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@ -3388,7 +3393,7 @@ bge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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break;
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case SIOCSIFMEDIA:
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case SIOCGIFMEDIA:
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if (sc->bge_tbi) {
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if (sc->bge_flags & BGE_FLAG_TBI) {
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error = ifmedia_ioctl(ifp, ifr,
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&sc->bge_ifmedia, command);
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} else {
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@ -3476,7 +3481,7 @@ bge_stop(struct bge_softc *sc)
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ifp = sc->bge_ifp;
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if (!sc->bge_tbi)
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if ((sc->bge_flags & BGE_FLAG_TBI) == 0)
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mii = device_get_softc(sc->bge_miibus);
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callout_stop(&sc->bge_stat_ch);
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@ -3544,7 +3549,7 @@ bge_stop(struct bge_softc *sc)
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* unchanged so that things will be put back to normal when
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* we bring the interface back up.
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*/
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if (!sc->bge_tbi) {
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if ((sc->bge_flags & BGE_FLAG_TBI) == 0) {
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itmp = ifp->if_flags;
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ifp->if_flags |= IFF_UP;
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/*
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@ -3682,7 +3687,7 @@ bge_link_upd(struct bge_softc *sc)
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return;
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}
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if (sc->bge_tbi) {
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if (sc->bge_flags & BGE_FLAG_TBI) {
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status = CSR_READ_4(sc, BGE_MAC_STS);
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if (status & BGE_MACSTAT_TBI_PCS_SYNCHED) {
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if (!sc->bge_link) {
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@ -2444,15 +2444,16 @@ struct bge_softc {
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struct resource *bge_irq;
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struct resource *bge_res;
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struct ifmedia bge_ifmedia; /* TBI media info */
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uint8_t bge_extram; /* has external SSRAM */
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uint8_t bge_tbi;
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uint8_t bge_rx_alignment_bug;
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uint32_t bge_flags;
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#define BGE_FLAG_EXTRAM 0x00000001 /* Has external SSRAM. */
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#define BGE_FLAG_TBI 0x00000002
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#define BGE_FLAG_RX_ALIGNBUG 0x00000004
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#define BGE_FLAG_NO3LED 0x00000008
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#define BGE_FLAG_PCIX 0x00000010
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#define BGE_FLAG_PCIE 0x00000020
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uint32_t bge_chipid;
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uint8_t bge_asicrev;
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uint8_t bge_chiprev;
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uint8_t bge_no_3_led;
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uint8_t bge_pcie;
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uint8_t bge_pcix;
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struct bge_ring_data bge_ldata; /* rings */
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struct bge_chain_data bge_cdata; /* mbufs */
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uint16_t bge_tx_saved_considx;
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