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Remove platform_cpu_idle() and platform_cpu_idle_wakeup() interfaces

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These interfaces were put in place to let QorIQ SoCs dictate CPU idling
semantics, in order to support capabilities such as NAP mode and deep sleep.
However, this never stabilized, and the idling support reverted back to
CPU-level rather than SoC level.  Move this code back to cpu.c instead.  If
at a later date the lower power modes do come to fruition, it should be done
by overriding the cpu_idle_hook instead of this platform hook.
This commit is contained in:
Justin Hibbits 2018-02-24 01:46:56 +00:00
parent fc287c10fb
commit 6708989b60
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=329891
5 changed files with 22 additions and 70 deletions
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2
sys/powerpc/include/platform.h
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@ -62,8 +62,6 @@ void platform_smp_ap_init(void);
const char *installed_platform(void);
void platform_probe_and_attach(void);
void platform_cpu_idle(int);
void platform_sleep(void);
#endif /* _MACHINE_PLATFORM_H_ */

29
sys/powerpc/mpc85xx/platform_mpc85xx.c
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@ -95,8 +95,6 @@ static int mpc85xx_smp_next_cpu(platform_t, struct cpuref *cpuref);
static int mpc85xx_smp_get_bsp(platform_t, struct cpuref *cpuref);
static int mpc85xx_smp_start_cpu(platform_t, struct pcpu *cpu);
static void mpc85xx_smp_timebase_sync(platform_t, u_long tb, int ap);
static void mpc85xx_idle(platform_t, int cpu);
static int mpc85xx_idle_wakeup(platform_t plat, int cpu);
static void mpc85xx_reset(platform_t);
@ -113,8 +111,6 @@ static platform_method_t mpc85xx_methods[] = {
PLATFORMMETHOD(platform_smp_timebase_sync, mpc85xx_smp_timebase_sync),
PLATFORMMETHOD(platform_reset, mpc85xx_reset),
PLATFORMMETHOD(platform_idle, mpc85xx_idle),
PLATFORMMETHOD(platform_idle_wakeup, mpc85xx_idle_wakeup),
PLATFORMMETHOD_END
};
@ -539,28 +535,3 @@ mpc85xx_smp_timebase_sync(platform_t plat, u_long tb, int ap)
mttb(tb);
}
static void
mpc85xx_idle(platform_t plat, int cpu)
{
uint32_t reg;
if (mpc85xx_is_qoriq()) {
/*
* Base binutils doesn't know what the 'wait' instruction is, so
* use the opcode encoding here.
*/
__asm __volatile("wrteei 1; .long 0x7c00007c");
} else {
reg = mfmsr();
/* Freescale E500 core RM section 6.4.1. */
__asm __volatile("msync; mtmsr %0; isync" ::
"r" (reg | PSL_WE));
}
}
static int
mpc85xx_idle_wakeup(platform_t plat, int cpu)
{
return (0);
}

24
sys/powerpc/powerpc/cpu.c
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@ -719,9 +719,29 @@ cpu_idle_60x(sbintime_t sbt)
static void
cpu_idle_booke(sbintime_t sbt)
{
register_t msr;
uint16_t vers;
#ifdef BOOKE_E500
platform_cpu_idle(PCPU_GET(cpuid));
msr = mfmsr();
vers = mfpvr() >> 16;
#ifdef BOOKE
switch (vers) {
case FSL_E500mc:
case FSL_E5500:
case FSL_E6500:
/*
* Base binutils doesn't know what the 'wait' instruction is, so
* use the opcode encoding here.
*/
__asm __volatile(".long 0x7c00007c");
break;
default:
powerpc_sync();
mtmsr(msr | PSL_WE);
isync();
break;
}
#endif
}

13
sys/powerpc/powerpc/platform.c
View File

@ -255,19 +255,6 @@ cpu_reset()
PLATFORM_RESET(plat_obj);
}
int
cpu_idle_wakeup(int cpu)
{
return (PLATFORM_IDLE_WAKEUP(plat_obj, cpu));
}
void
platform_cpu_idle(int cpu)
{
PLATFORM_IDLE(plat_obj, cpu);
}
void platform_smp_timebase_sync(u_long tb, int ap)
{

24
sys/powerpc/powerpc/platform_if.m
View File

@ -84,14 +84,6 @@ CODE {
{
return;
}
static void platform_null_idle(platform_t plat, int cpu)
{
return;
}
static int platform_null_idle_wakeup(platform_t plat, int cpu)
{
return (0);
}
};
/**
@ -218,22 +210,6 @@ METHOD void reset {
platform_t _plat;
};
/**
* @brief Idle a CPU
*/
METHOD void idle {
platform_t _plat;
int _cpu;
} DEFAULT platform_null_idle;
/**
* @brief Wake up an idle CPU
*/
METHOD int idle_wakeup {
platform_t _plat;
int _cpu;
} DEFAULT platform_null_idle_wakeup;
/**
* @brief Suspend the CPU
*/