Two comments and one bug fix:
o Add defines for the VS[12]# bits in register 0x16. o Add comment about what we're doing reading register 0x16 (PCIC_CDGC) in the DF case. o Check bit VS1# rather than a random bit I was checking due to a bogus transcrition on my part from nakagawa-san's article. o Add note about IBM KING and 3.3V operation from information larned from wildboard.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=76915
@ -207,6 +207,8 @@
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#define PCIC_GPI_TRANS 0x08 /* GPI Transition Control */
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#define PCIC_CDRES_EN 0x10 /* card detect resume enable */
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#define PCIC_SW_CD_INT 0x20 /* s/w card detect interrupt */
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#define PCIC_VS1STAT 0x40 /* 0 VS1# low, 1 VS1# high */
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#define PCIC_VS2STAT 0x80 /* 0 VS2# low, 1 VS2# high */
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/* CL-PD67[12]x: For 3.3V cards, etc. (PCIC_MISC1) */
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#define PCIC_MISC1_5V_DETECT 0x01 /* PD6710 only */
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@ -378,11 +378,13 @@ pcic_power(struct slot *slt)
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switch(sp->controller) {
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case PCIC_I82365SL_DF:
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/*
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* Check to see if the power on bit is clear. If so, we're
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* using the wrong voltage and should try 3.3V instead.
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* Look at the VS[12]# bits on the card. If VS1 is clear
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* then we should apply 3.3 volts. Maybe we should do this
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* with other cards too. Cirrus logic cards (PD67[12]*) do
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* things like this in a different way.
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*/
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c = sp->getb(sp, PCIC_CDGC);
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if ((c & PCIC_POW) == 0)
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if ((c & PCIC_VS1STAT) == 0)
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slt->pwr.vcc = 33;
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/* FALL THROUGH */
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case PCIC_I82365:
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@ -413,6 +415,14 @@ pcic_power(struct slot *slt)
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case 0:
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break;
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case 33:
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/*
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* The wildboar code has comments that state that
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* the IBM KING controller doesn't support 3.3V
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* on the "IBM Smart PC card drive". The code
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* intemates that's the only place they have seen
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* it used and that there's a boatload of issues
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* with it.
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*/
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if (sp->controller == PCIC_IBM_KING) {
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reg |= PCIC_VCC_5V_KING;
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break;
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