From 6a32dae2b755792c6dbb7fa1bc7ee54fdb912dc0 Mon Sep 17 00:00:00 2001 From: Leandro Lupori Date: Thu, 5 Nov 2020 20:18:00 +0000 Subject: [PATCH] Fix powerpc and powerpcspe builds This change fixes 32-bit PowerPC builds, that r367390 broke (shift count >= width of type). --- sys/powerpc/include/spr.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sys/powerpc/include/spr.h b/sys/powerpc/include/spr.h index fc9767ed8c97..4cb39ea7e7be 100644 --- a/sys/powerpc/include/spr.h +++ b/sys/powerpc/include/spr.h @@ -492,13 +492,13 @@ #define SPR_MMCR2 0x311 #define SPR_MMCR2_CNBIT(n, bit) ((bit) << (((5 - (n)) * 9) + 10)) -#define SPR_MMCR2_FCNS(n) SPR_MMCR2_CNBIT(n, 0x100UL) -#define SPR_MMCR2_FCNP0(n) SPR_MMCR2_CNBIT(n, 0x080UL) -#define SPR_MMCR2_FCNP1(n) SPR_MMCR2_CNBIT(n, 0x040UL) -#define SPR_MMCR2_FCNM1(n) SPR_MMCR2_CNBIT(n, 0x020UL) -#define SPR_MMCR2_FCNM0(n) SPR_MMCR2_CNBIT(n, 0x010UL) -#define SPR_MMCR2_FCNWAIT(n) SPR_MMCR2_CNBIT(n, 0x008UL) -#define SPR_MMCR2_FCNH(n) SPR_MMCR2_CNBIT(n, 0x004UL) +#define SPR_MMCR2_FCNS(n) SPR_MMCR2_CNBIT(n, 0x100ULL) +#define SPR_MMCR2_FCNP0(n) SPR_MMCR2_CNBIT(n, 0x080ULL) +#define SPR_MMCR2_FCNP1(n) SPR_MMCR2_CNBIT(n, 0x040ULL) +#define SPR_MMCR2_FCNM1(n) SPR_MMCR2_CNBIT(n, 0x020ULL) +#define SPR_MMCR2_FCNM0(n) SPR_MMCR2_CNBIT(n, 0x010ULL) +#define SPR_MMCR2_FCNWAIT(n) SPR_MMCR2_CNBIT(n, 0x008ULL) +#define SPR_MMCR2_FCNH(n) SPR_MMCR2_CNBIT(n, 0x004ULL) /* Freeze Counter N in Hypervisor/Supervisor/Problem states */ #define SPR_MMCR2_FCNHSP(n) \ (SPR_MMCR2_FCNS(n) | SPR_MMCR2_FCNP0(n) | \