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riscv: Assert that SUM is not set in SSTATUS for exceptions.

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Reviewed by:	mhorne
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D29764
This commit is contained in:
John Baldwin 2021-04-21 13:57:20 -07:00
parent 753bcca440
commit 6a3a6fe34b
1 changed files with 6 additions and 0 deletions
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6
sys/riscv/riscv/trap.c
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@ -274,6 +274,9 @@ do_trap_supervisor(struct trapframe *frame)
KASSERT((csr_read(sstatus) & (SSTATUS_SPP | SSTATUS_SIE)) ==
SSTATUS_SPP, ("Came from S mode with interrupts enabled"));
KASSERT((csr_read(sstatus) & (SSTATUS_SUM)) == 0,
("Came from S mode with SUM enabled"));
exception = frame->tf_scause & SCAUSE_CODE;
if ((frame->tf_scause & SCAUSE_INTR) != 0) {
/* Interrupt */
@ -342,6 +345,9 @@ do_trap_user(struct trapframe *frame)
KASSERT((csr_read(sstatus) & (SSTATUS_SPP | SSTATUS_SIE)) == 0,
("Came from U mode with interrupts enabled"));
KASSERT((csr_read(sstatus) & (SSTATUS_SUM)) == 0,
("Came from U mode with SUM enabled"));
exception = frame->tf_scause & SCAUSE_CODE;
if ((frame->tf_scause & SCAUSE_INTR) != 0) {
/* Interrupt */