bhyve: build FADT table by basl
Building the FADT table by basl will allow it to be loaded by qemu's ACPI table loader in the future. Reviewed by: jhb, markj (older version) Approved by: manu (mentor) MFC after: 2 weeks Sponsored by: Beckhoff Automation GmbH & Co. KG Differential Revision: https://reviews.freebsd.org/D36998
This commit is contained in:
parent
897fe59adf
commit
6a75de903b
@ -65,6 +65,7 @@ __FBSDID("$FreeBSD$");
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#include <err.h>
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#include <paths.h>
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#include <stdarg.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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@ -243,223 +244,6 @@ basl_fwrite_xsdt(FILE *fp)
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return (errno);
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}
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static int
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basl_fwrite_fadt(FILE *fp)
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{
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EFPRINTF(fp, "/*\n");
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EFPRINTF(fp, " * bhyve FADT template\n");
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EFPRINTF(fp, " */\n");
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EFPRINTF(fp, "[0004]\t\tSignature : \"FACP\"\n");
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EFPRINTF(fp, "[0004]\t\tTable Length : 0000010C\n");
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EFPRINTF(fp, "[0001]\t\tRevision : 05\n");
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EFPRINTF(fp, "[0001]\t\tChecksum : 00\n");
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EFPRINTF(fp, "[0006]\t\tOem ID : \"BHYVE \"\n");
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EFPRINTF(fp, "[0008]\t\tOem Table ID : \"BVFACP \"\n");
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EFPRINTF(fp, "[0004]\t\tOem Revision : 00000001\n");
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/* iasl will fill in the compiler ID/revision fields */
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EFPRINTF(fp, "[0004]\t\tAsl Compiler ID : \"xxxx\"\n");
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EFPRINTF(fp, "[0004]\t\tAsl Compiler Revision : 00000000\n");
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EFPRINTF(fp, "\n");
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EFPRINTF(fp, "[0004]\t\tFACS Address : %08X\n",
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basl_acpi_base + FACS_OFFSET);
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EFPRINTF(fp, "[0004]\t\tDSDT Address : %08X\n",
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basl_acpi_base + DSDT_OFFSET);
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EFPRINTF(fp, "[0001]\t\tModel : 01\n");
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EFPRINTF(fp, "[0001]\t\tPM Profile : 00 [Unspecified]\n");
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EFPRINTF(fp, "[0002]\t\tSCI Interrupt : %04X\n",
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SCI_INT);
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EFPRINTF(fp, "[0004]\t\tSMI Command Port : %08X\n",
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SMI_CMD);
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EFPRINTF(fp, "[0001]\t\tACPI Enable Value : %02X\n",
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BHYVE_ACPI_ENABLE);
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EFPRINTF(fp, "[0001]\t\tACPI Disable Value : %02X\n",
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BHYVE_ACPI_DISABLE);
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EFPRINTF(fp, "[0001]\t\tS4BIOS Command : 00\n");
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EFPRINTF(fp, "[0001]\t\tP-State Control : 00\n");
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EFPRINTF(fp, "[0004]\t\tPM1A Event Block Address : %08X\n",
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PM1A_EVT_ADDR);
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EFPRINTF(fp, "[0004]\t\tPM1B Event Block Address : 00000000\n");
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EFPRINTF(fp, "[0004]\t\tPM1A Control Block Address : %08X\n",
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PM1A_CNT_ADDR);
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EFPRINTF(fp, "[0004]\t\tPM1B Control Block Address : 00000000\n");
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EFPRINTF(fp, "[0004]\t\tPM2 Control Block Address : 00000000\n");
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EFPRINTF(fp, "[0004]\t\tPM Timer Block Address : %08X\n",
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IO_PMTMR);
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EFPRINTF(fp, "[0004]\t\tGPE0 Block Address : %08X\n", IO_GPE0_BLK);
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EFPRINTF(fp, "[0004]\t\tGPE1 Block Address : 00000000\n");
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EFPRINTF(fp, "[0001]\t\tPM1 Event Block Length : 04\n");
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EFPRINTF(fp, "[0001]\t\tPM1 Control Block Length : 02\n");
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EFPRINTF(fp, "[0001]\t\tPM2 Control Block Length : 00\n");
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EFPRINTF(fp, "[0001]\t\tPM Timer Block Length : 04\n");
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EFPRINTF(fp, "[0001]\t\tGPE0 Block Length : %02x\n", IO_GPE0_LEN);
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EFPRINTF(fp, "[0001]\t\tGPE1 Block Length : 00\n");
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EFPRINTF(fp, "[0001]\t\tGPE1 Base Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\t_CST Support : 00\n");
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EFPRINTF(fp, "[0002]\t\tC2 Latency : 0000\n");
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EFPRINTF(fp, "[0002]\t\tC3 Latency : 0000\n");
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EFPRINTF(fp, "[0002]\t\tCPU Cache Size : 0000\n");
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EFPRINTF(fp, "[0002]\t\tCache Flush Stride : 0000\n");
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EFPRINTF(fp, "[0001]\t\tDuty Cycle Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\tDuty Cycle Width : 00\n");
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EFPRINTF(fp, "[0001]\t\tRTC Day Alarm Index : 00\n");
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EFPRINTF(fp, "[0001]\t\tRTC Month Alarm Index : 00\n");
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EFPRINTF(fp, "[0001]\t\tRTC Century Index : 32\n");
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EFPRINTF(fp, "[0002]\t\tBoot Flags (decoded below) : 0000\n");
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EFPRINTF(fp, "\t\t\tLegacy Devices Supported (V2) : 0\n");
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EFPRINTF(fp, "\t\t\t8042 Present on ports 60/64 (V2) : 0\n");
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EFPRINTF(fp, "\t\t\tVGA Not Present (V4) : 1\n");
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EFPRINTF(fp, "\t\t\tMSI Not Supported (V4) : 0\n");
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EFPRINTF(fp, "\t\t\tPCIe ASPM Not Supported (V4) : 1\n");
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EFPRINTF(fp, "\t\t\tCMOS RTC Not Present (V5) : 0\n");
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EFPRINTF(fp, "[0001]\t\tReserved : 00\n");
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EFPRINTF(fp, "[0004]\t\tFlags (decoded below) : 00000000\n");
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EFPRINTF(fp, "\t\t\tWBINVD instruction is operational (V1) : 1\n");
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EFPRINTF(fp, "\t\t\tWBINVD flushes all caches (V1) : 0\n");
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EFPRINTF(fp, "\t\t\tAll CPUs support C1 (V1) : 1\n");
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EFPRINTF(fp, "\t\t\tC2 works on MP system (V1) : 0\n");
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EFPRINTF(fp, "\t\t\tControl Method Power Button (V1) : 0\n");
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EFPRINTF(fp, "\t\t\tControl Method Sleep Button (V1) : 1\n");
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EFPRINTF(fp, "\t\t\tRTC wake not in fixed reg space (V1) : 0\n");
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EFPRINTF(fp, "\t\t\tRTC can wake system from S4 (V1) : 0\n");
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EFPRINTF(fp, "\t\t\t32-bit PM Timer (V1) : 1\n");
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EFPRINTF(fp, "\t\t\tDocking Supported (V1) : 0\n");
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EFPRINTF(fp, "\t\t\tReset Register Supported (V2) : 1\n");
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EFPRINTF(fp, "\t\t\tSealed Case (V3) : 0\n");
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EFPRINTF(fp, "\t\t\tHeadless - No Video (V3) : 1\n");
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EFPRINTF(fp, "\t\t\tUse native instr after SLP_TYPx (V3) : 0\n");
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EFPRINTF(fp, "\t\t\tPCIEXP_WAK Bits Supported (V4) : 0\n");
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EFPRINTF(fp, "\t\t\tUse Platform Timer (V4) : 0\n");
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EFPRINTF(fp, "\t\t\tRTC_STS valid on S4 wake (V4) : 0\n");
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EFPRINTF(fp, "\t\t\tRemote Power-on capable (V4) : 0\n");
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EFPRINTF(fp, "\t\t\tUse APIC Cluster Model (V4) : 0\n");
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EFPRINTF(fp, "\t\t\tUse APIC Physical Destination Mode (V4) : 1\n");
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EFPRINTF(fp, "\t\t\tHardware Reduced (V5) : 0\n");
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EFPRINTF(fp, "\t\t\tLow Power S0 Idle (V5) : 0\n");
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EFPRINTF(fp, "\n");
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EFPRINTF(fp,
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"[0012]\t\tReset Register : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000CF9\n");
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EFPRINTF(fp, "\n");
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EFPRINTF(fp, "[0001]\t\tValue to cause reset : 06\n");
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EFPRINTF(fp, "[0002]\t\tARM Flags (decoded below): 0000\n");
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EFPRINTF(fp, "\t\t\tPSCI Compliant : 0\n");
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EFPRINTF(fp, "\t\t\tMust use HVC for PSCI : 0\n");
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EFPRINTF(fp, "[0001]\t\tFADT Minor Revision : 01\n");
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EFPRINTF(fp, "[0008]\t\tFACS Address : 00000000%08X\n",
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basl_acpi_base + FACS_OFFSET);
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EFPRINTF(fp, "[0008]\t\tDSDT Address : 00000000%08X\n",
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basl_acpi_base + DSDT_OFFSET);
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EFPRINTF(fp,
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"[0012]\t\tPM1A Event Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 20\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 02 [Word Access:16]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 00000000%08X\n",
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PM1A_EVT_ADDR);
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EFPRINTF(fp, "\n");
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EFPRINTF(fp,
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"[0012]\t\tPM1B Event Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 00\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp,
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"[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
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EFPRINTF(fp, "\n");
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EFPRINTF(fp,
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"[0012]\t\tPM1A Control Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 10\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 02 [Word Access:16]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 00000000%08X\n",
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PM1A_CNT_ADDR);
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EFPRINTF(fp, "\n");
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EFPRINTF(fp,
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"[0012]\t\tPM1B Control Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 00\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp,
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"[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
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EFPRINTF(fp, "\n");
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EFPRINTF(fp,
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"[0012]\t\tPM2 Control Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp,
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"[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
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EFPRINTF(fp, "\n");
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/* Valid for bhyve */
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EFPRINTF(fp,
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"[0012]\t\tPM Timer Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 20\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp,
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"[0001]\t\tEncoded Access Width : 03 [DWord Access:32]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 00000000%08X\n",
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IO_PMTMR);
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EFPRINTF(fp, "\n");
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EFPRINTF(fp, "[0012]\t\tGPE0 Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : %02x\n", IO_GPE0_LEN * 8);
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : %016X\n", IO_GPE0_BLK);
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EFPRINTF(fp, "\n");
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EFPRINTF(fp, "[0012]\t\tGPE1 Block : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 00\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp,
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"[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
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EFPRINTF(fp, "\n");
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EFPRINTF(fp,
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"[0012]\t\tSleep Control Register : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
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EFPRINTF(fp, "\n");
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EFPRINTF(fp,
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"[0012]\t\tSleep Status Register : [Generic Address Structure]\n");
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EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
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EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
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EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
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EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
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EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
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EFFLUSH(fp);
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return (0);
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err_exit:
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return (errno);
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}
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/*
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* Helper routines for writing to the DSDT from other modules.
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*/
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@ -790,6 +574,77 @@ build_facs(struct vmctx *const ctx)
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return (0);
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}
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static int
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build_fadt(struct vmctx *const ctx)
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{
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ACPI_TABLE_FADT fadt;
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struct basl_table *table;
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BASL_EXEC(basl_table_create(&table, ctx, ACPI_SIG_FADT,
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BASL_TABLE_ALIGNMENT, FADT_OFFSET));
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memset(&fadt, 0, sizeof(fadt));
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BASL_EXEC(basl_table_append_header(table, ACPI_SIG_FADT, 5, 1));
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fadt.Facs = htole32(0); /* patched by basl */
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fadt.Dsdt = htole32(0); /* patched by basl */
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fadt.SciInterrupt = htole16(SCI_INT);
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fadt.SmiCommand = htole32(SMI_CMD);
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fadt.AcpiEnable = BHYVE_ACPI_ENABLE;
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fadt.AcpiDisable = BHYVE_ACPI_DISABLE;
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fadt.Pm1aEventBlock = htole32(PM1A_EVT_ADDR);
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fadt.Pm1aControlBlock = htole32(PM1A_CNT_ADDR);
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fadt.PmTimerBlock = htole32(IO_PMTMR);
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fadt.Gpe0Block = htole32(IO_GPE0_BLK);
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fadt.Pm1EventLength = 4;
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fadt.Pm1ControlLength = 2;
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fadt.PmTimerLength = 4;
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fadt.Gpe0BlockLength = IO_GPE0_LEN;
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fadt.Century = 0x32;
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fadt.BootFlags = htole16(ACPI_FADT_NO_VGA | ACPI_FADT_NO_ASPM);
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fadt.Flags = htole32(ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
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ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_32BIT_TIMER |
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ACPI_FADT_RESET_REGISTER | ACPI_FADT_HEADLESS |
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ACPI_FADT_APIC_PHYSICAL);
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basl_fill_gas(&fadt.ResetRegister, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
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ACPI_GAS_ACCESS_WIDTH_BYTE, 0xCF9);
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fadt.ResetValue = 6;
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fadt.MinorRevision = 1;
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fadt.XFacs = htole64(0); /* patched by basl */
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fadt.XDsdt = htole64(0); /* patched by basl */
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basl_fill_gas(&fadt.XPm1aEventBlock, ACPI_ADR_SPACE_SYSTEM_IO, 0x20, 0,
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ACPI_GAS_ACCESS_WIDTH_WORD, PM1A_EVT_ADDR);
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basl_fill_gas(&fadt.XPm1bEventBlock, ACPI_ADR_SPACE_SYSTEM_IO, 0, 0,
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ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0);
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basl_fill_gas(&fadt.XPm1aControlBlock, ACPI_ADR_SPACE_SYSTEM_IO, 0x10,
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0, ACPI_GAS_ACCESS_WIDTH_WORD, PM1A_CNT_ADDR);
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basl_fill_gas(&fadt.XPm1bControlBlock, ACPI_ADR_SPACE_SYSTEM_IO, 0, 0,
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ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0);
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basl_fill_gas(&fadt.XPm2ControlBlock, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
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ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0);
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basl_fill_gas(&fadt.XPmTimerBlock, ACPI_ADR_SPACE_SYSTEM_IO, 0x20, 0,
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ACPI_GAS_ACCESS_WIDTH_DWORD, IO_PMTMR);
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basl_fill_gas(&fadt.XGpe0Block, ACPI_ADR_SPACE_SYSTEM_IO,
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IO_GPE0_LEN * 8, 0, ACPI_GAS_ACCESS_WIDTH_BYTE, IO_GPE0_BLK);
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basl_fill_gas(&fadt.XGpe1Block, ACPI_ADR_SPACE_SYSTEM_IO, 0, 0,
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ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0);
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basl_fill_gas(&fadt.SleepControl, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
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ACPI_GAS_ACCESS_WIDTH_BYTE, 0);
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basl_fill_gas(&fadt.SleepStatus, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
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ACPI_GAS_ACCESS_WIDTH_BYTE, 0);
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BASL_EXEC(basl_table_append_content(table, &fadt, sizeof(fadt)));
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BASL_EXEC(basl_table_add_pointer(table, ACPI_SIG_FACS,
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offsetof(ACPI_TABLE_FADT, Facs), sizeof(fadt.Facs)));
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BASL_EXEC(basl_table_add_pointer(table, ACPI_SIG_DSDT,
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offsetof(ACPI_TABLE_FADT, Dsdt), sizeof(fadt.Dsdt)));
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BASL_EXEC(basl_table_add_pointer(table, ACPI_SIG_FACS,
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offsetof(ACPI_TABLE_FADT, XFacs), sizeof(fadt.XFacs)));
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BASL_EXEC(basl_table_add_pointer(table, ACPI_SIG_DSDT,
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offsetof(ACPI_TABLE_FADT, XDsdt), sizeof(fadt.XDsdt)));
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return (0);
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}
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static int
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build_hpet(struct vmctx *const ctx)
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{
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@ -938,11 +793,15 @@ acpi_build(struct vmctx *ctx, int ncpu)
|
||||
/*
|
||||
* Run through all the ASL files, compiling them and
|
||||
* copying them into guest memory
|
||||
*
|
||||
* According to UEFI Specification v6.3 chapter 5.1 the FADT should be
|
||||
* the first table pointed to by XSDT. For that reason, build it as the
|
||||
* first table after XSDT.
|
||||
*/
|
||||
BASL_EXEC(basl_compile(ctx, basl_fwrite_rsdp, 0));
|
||||
BASL_EXEC(basl_compile(ctx, basl_fwrite_rsdt, RSDT_OFFSET));
|
||||
BASL_EXEC(basl_compile(ctx, basl_fwrite_xsdt, XSDT_OFFSET));
|
||||
BASL_EXEC(basl_compile(ctx, basl_fwrite_fadt, FADT_OFFSET));
|
||||
BASL_EXEC(build_fadt(ctx));
|
||||
BASL_EXEC(build_madt(ctx));
|
||||
BASL_EXEC(build_hpet(ctx));
|
||||
BASL_EXEC(build_mcfg(ctx));
|
||||
|
Loading…
Reference in New Issue
Block a user