Back out an inappropriate backout. If Anyone wants to set the FIFO

level that high they should first fix the problems with the system that
cause silo overflows.  It is far more important for the serial device
to work.
This commit is contained in:
Matthew Dillon 2001-12-23 02:48:25 +00:00
parent f36422c140
commit 6aebdaaf0a
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=88433

View File

@ -2161,9 +2161,14 @@ comparam(tp, t)
* latencies are reasonable for humans. Serial comms
* protocols shouldn't expect anything better since modem
* latencies are larger.
*
* The fifo trigger level cannot be set at RX_HIGH for high
* speed connections without further work on reducing
* interrupt disablement times in other parts of the system,
* without producing silo overflow errors.
*/
com->fifo_image = t->c_ospeed <= 4800
? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH;
? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDHI;
#ifdef COM_ESP
/*
* The Hayes ESP card needs the fifo DMA mode bit set