Pack the SWI bits to save some time and space.
This commit is contained in:
parent
a339e6448b
commit
6b4a3ce242
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=61130
@ -739,13 +739,13 @@ _ihandlers:
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* apic_ipl.s: splz_unpend
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*/
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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/* active flag for lazy masking */
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iactive:
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@ -209,16 +209,12 @@ _ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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.text
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@ -209,16 +209,12 @@ _ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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.text
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@ -209,16 +209,12 @@ _ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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.text
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@ -739,13 +739,13 @@ _ihandlers:
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* apic_ipl.s: splz_unpend
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*/
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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/* active flag for lazy masking */
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iactive:
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@ -53,8 +53,8 @@
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#define SWI_CAMBIO (NHWI + 3)
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#define SWI_VM (NHWI + 4)
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#define SWI_TQ (NHWI + 5)
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#define SWI_CLOCK 30
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#define NSWI (32 - NHWI)
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#define SWI_CLOCK (NHWI + 6)
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#define NSWI 7
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/*
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* Corresponding interrupt-pending bits for ipending.
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@ -739,13 +739,13 @@ _ihandlers:
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* apic_ipl.s: splz_unpend
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*/
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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/* active flag for lazy masking */
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iactive:
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@ -209,16 +209,12 @@ _ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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.text
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@ -209,16 +209,12 @@ _ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long _swi_null, swi_net, _swi_null, _swi_null
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.long _swi_vm, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _swi_null, _swi_null
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.long _swi_null, _swi_null, _softclock, _swi_null
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.long _swi_vm, _swi_null, _softclock
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imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long SWI_VM_MASK, SWI_TQ_MASK, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, 0
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.long SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
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.text
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