Fall back to using configuration type 1 accesses for PCI config requests if
the requested PCI bus falls outside of the bus range given in the ACPI MCFG table. Several BIOSes seem to not include all of the PCI busses in systems in their MCFG tables. It maybe that the BIOS is simply buggy and does support all the busses, but it is more conservative to just fall back to the old method unless it is certain that memory accesses will work.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=190386
@ -119,6 +119,7 @@ pci_docfgregread(int bus, int slot, int func, int reg, int bytes)
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{
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if (cfgmech == CFGMECH_PCIE &&
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(bus >= pcie_minbus && bus <= pcie_maxbus) &&
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(bus != 0 || !(1 << slot & pcie_badslots)))
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return (pciereg_cfgread(bus, slot, func, reg, bytes));
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else
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@ -158,6 +159,7 @@ pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
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{
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if (cfgmech == CFGMECH_PCIE &&
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(bus >= pcie_minbus && bus <= pcie_maxbus) &&
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(bus != 0 || !(1 << slot & pcie_badslots)))
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pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
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else
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@ -206,6 +206,7 @@ pci_docfgregread(int bus, int slot, int func, int reg, int bytes)
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{
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if (cfgmech == CFGMECH_PCIE &&
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(bus >= pcie_minbus && bus <= pcie_maxbus) &&
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(bus != 0 || !(1 << slot & pcie_badslots)))
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return (pciereg_cfgread(bus, slot, func, reg, bytes));
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else
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@ -240,6 +241,7 @@ pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
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{
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if (cfgmech == CFGMECH_PCIE &&
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(bus >= pcie_minbus && bus <= pcie_maxbus) &&
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(bus != 0 || !(1 << slot & pcie_badslots)))
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pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
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else
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