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Remove two features that have been reported to cause problems with

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certain variants of the NCR chip from FE_CACHE_SET: FE_CLSE (enable
cache-line size register) and FE_ERMP (enable read-multiple). They
will be re-enabled, if a fix for the underlying problem (a restriction
in the memory to memory move logic of some chips) has been implemented.
This commit is contained in:
Stefan Eßer 1997-08-06 20:25:54 +00:00
parent 3ee1f2280e
commit 6d529e4303
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=27943
1 changed files with 3 additions and 2 deletions
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5
sys/pci/ncrreg.h
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@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: ncrreg.h,v 1.7 1997/02/22 09:44:10 peter Exp $
** $Id: ncrreg.h,v 1.8 1997/07/25 20:45:09 se Exp $
**
** Device driver for the NCR 53C810 PCI-SCSI-Controller.
**
@ -603,7 +603,8 @@ struct scr_tblsel {
#define FE_CLK80 (1<<15)
#define FE_DIFF (1<<16)
#define FE_BIOS (1<<17)
#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)
/*#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)*/
#define FE_CACHE_SET (FE_ERL|FE_WRIE)
#define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_ULTRA2|FE_DBLR|FE_QUAD|F_CLK80)
#define FE_SPECIAL_SET (FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM)