- Complete the myri10ge -> mxge name change by doing a mechanical
s/myri10ge/mxge/g replacement in the myri10ge files. A few contuation lines were joined because of the regained columns. - Hook the mxge driver back to the build.
This commit is contained in:
parent
b41f1452d9
commit
6d87a65da4
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=159571
@ -165,6 +165,7 @@ MAN= aac.4 \
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mpt.4 \
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mtio.4 \
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multicast.4 \
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mxge.4 \
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my.4 \
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natm.4 \
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natmip.4 \
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@ -35,7 +35,7 @@
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.Dt MYRI10GE 4
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.Os
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.Sh NAME
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.Nm myri10ge
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.Nm mxge
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.Nd "Myricom Myri10GE 10 Gigabit Ethernet adapter driver"
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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@ -43,16 +43,16 @@ place the following lines in your
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kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device firmware"
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.Cd "device myri10ge"
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.Cd "device mxge"
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.Ed
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.Pp
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Alternatively, to load the driver as a
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module at boot time, place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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if_myri10ge_load="YES"
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myri10ge_ethp_z8e_load="YES"
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myri10ge_eth_z8e_load="YES"
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if_mxge_load="YES"
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mxge_ethp_z8e_load="YES"
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mxge_eth_z8e_load="YES"
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.Ed
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.Sh DESCRIPTION
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The
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@ -96,13 +96,13 @@ Tunables can be set at the
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prompt before booting the kernel or stored in
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.Xr loader.conf 5 .
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.Bl -tag -width indent
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.It Va hw.myri10ge.flow_control_enabled
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.It Va hw.mxge.flow_control_enabled
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Whether or not hardware flow control is enabled on the adapter.
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The default value is 1.
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.It Va hw.myri10ge.intr_coal_delay
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.It Va hw.mxge.intr_coal_delay
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This value delays the generation of all interrupts in units of
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1 microsecond. The default value is 30.
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.It Va hw.myri10ge.skip_pio_read
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.It Va hw.mxge.skip_pio_read
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This value determines whether or not the driver may omit doing a
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pio read in the interrupt handler which ensures that the interrupt
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line has been deasserted when using xPIC interrupts. A non-zero value
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@ -111,11 +111,11 @@ spurious interrupts. The default value is 0.
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.El
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "myri10ge%d: Unable to allocate bus resource: memory"
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.It "mxge%d: Unable to allocate bus resource: memory"
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A fatal initialization error has occurred.
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.It "myri10ge%d: Unable to allocate bus resource: interrupt"
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.It "mxge%d: Unable to allocate bus resource: interrupt"
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A fatal initialization error has occurred.
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.It "myri10ge%d: Could not find firmware image %s"
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.It "mxge%d: Could not find firmware image %s"
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The appropriate firmware kld module was not installed. This is a
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fatal initialization error.
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.El
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File diff suppressed because it is too large
Load Diff
@ -33,36 +33,36 @@ POSSIBILITY OF SUCH DAMAGE.
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***************************************************************************/
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#define MYRI10GE_MAX_ETHER_MTU 9014
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#define MXGE_MAX_ETHER_MTU 9014
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#define MYRI10GE_ETH_STOPPED 0
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#define MYRI10GE_ETH_STOPPING 1
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#define MYRI10GE_ETH_STARTING 2
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#define MYRI10GE_ETH_RUNNING 3
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#define MYRI10GE_ETH_OPEN_FAILED 4
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#define MXGE_ETH_STOPPED 0
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#define MXGE_ETH_STOPPING 1
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#define MXGE_ETH_STARTING 2
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#define MXGE_ETH_RUNNING 3
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#define MXGE_ETH_OPEN_FAILED 4
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#define MYRI10GE_FW_OFFSET 1024*1024
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#define MYRI10GE_EEPROM_STRINGS_SIZE 256
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#define MYRI10GE_NUM_INTRQS 2
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#define MXGE_FW_OFFSET 1024*1024
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#define MXGE_EEPROM_STRINGS_SIZE 256
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#define MXGE_NUM_INTRQS 2
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typedef struct {
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void *addr;
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bus_addr_t bus_addr;
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bus_dma_tag_t dmat;
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bus_dmamap_t map;
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} myri10ge_dma_t;
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} mxge_dma_t;
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typedef struct myri10ge_intrq
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typedef struct mxge_intrq
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{
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mcp_slot_t *q[MYRI10GE_NUM_INTRQS];
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mcp_slot_t *q[MXGE_NUM_INTRQS];
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int intrq;
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int slot;
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int maxslots;
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uint32_t seqnum;
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uint32_t spurious;
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uint32_t cnt;
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myri10ge_dma_t dma[MYRI10GE_NUM_INTRQS];
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} myri10ge_intrq_t;
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mxge_dma_t dma[MXGE_NUM_INTRQS];
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} mxge_intrq_t;
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typedef struct
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@ -70,9 +70,9 @@ typedef struct
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uint32_t data0;
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uint32_t data1;
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uint32_t data2;
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} myri10ge_cmd_t;
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} mxge_cmd_t;
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struct myri10ge_buffer_state {
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struct mxge_buffer_state {
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struct mbuf *m;
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bus_dmamap_t map;
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};
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@ -82,13 +82,13 @@ typedef struct
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volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
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volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */
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mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
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struct myri10ge_buffer_state *info;
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struct mxge_buffer_state *info;
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bus_dma_tag_t dmat;
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bus_dmamap_t extra_map;
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int cnt;
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int alloc_fail;
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int mask; /* number of rx slots -1 */
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} myri10ge_rx_buf_t;
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} mxge_rx_buf_t;
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typedef struct
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{
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@ -96,13 +96,13 @@ typedef struct
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volatile uint8_t *wc_fifo; /* w/c send fifo address */
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mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
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char *req_bytes;
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struct myri10ge_buffer_state *info;
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struct mxge_buffer_state *info;
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bus_dma_tag_t dmat;
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int req; /* transmits submitted */
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int mask; /* number of transmit slots -1 */
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int done; /* transmits completed */
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int boundary; /* boundary transmits cannot cross*/
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} myri10ge_tx_buf_t;
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} mxge_tx_buf_t;
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typedef struct {
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struct ifnet* ifp;
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@ -110,9 +110,9 @@ typedef struct {
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struct mtx tx_lock;
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int csum_flag; /* rx_csums? */
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uint8_t mac_addr[6]; /* eeprom mac address */
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myri10ge_tx_buf_t tx; /* transmit ring */
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myri10ge_rx_buf_t rx_small;
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myri10ge_rx_buf_t rx_big;
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mxge_tx_buf_t tx; /* transmit ring */
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mxge_rx_buf_t rx_small;
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mxge_rx_buf_t rx_big;
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bus_dma_tag_t parent_dmat;
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volatile uint8_t *sram;
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int sram_size;
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@ -120,13 +120,13 @@ typedef struct {
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char *mac_addr_string;
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char *product_code_string;
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mcp_cmd_response_t *cmd;
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myri10ge_dma_t cmd_dma;
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myri10ge_dma_t zeropad_dma;
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mxge_dma_t cmd_dma;
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mxge_dma_t zeropad_dma;
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mcp_stats_t *fw_stats;
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myri10ge_dma_t fw_stats_dma;
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mxge_dma_t fw_stats_dma;
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struct pci_dev *pdev;
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int msi_enabled;
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myri10ge_intrq_t intr;
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mxge_intrq_t intr;
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int link_state;
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unsigned int rdma_tags_available;
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int intr_coal_delay;
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@ -143,19 +143,19 @@ typedef struct {
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struct resource *irq_res;
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void *ih;
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char *fw_name;
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char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
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char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE];
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char fw_version[128];
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device_t dev;
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struct ifmedia media;
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} myri10ge_softc_t;
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} mxge_softc_t;
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#define MYRI10GE_PCI_VENDOR_MYRICOM 0x14c1
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#define MYRI10GE_PCI_DEVICE_Z8E 0x0008
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#define MXGE_PCI_VENDOR_MYRICOM 0x14c1
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#define MXGE_PCI_DEVICE_Z8E 0x0008
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#define MYRI10GE_HIGHPART_TO_U32(X) \
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#define MXGE_HIGHPART_TO_U32(X) \
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(sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0)
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#define MYRI10GE_LOWPART_TO_U32(X) ((uint32_t)(X))
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#define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X))
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/* implement our own memory barriers, since bus_space_barrier
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@ -176,7 +176,7 @@ typedef struct {
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#endif
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static inline void
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myri10ge_pio_copy(volatile void *to_v, void *from_v, size_t size)
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mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
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{
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register volatile uintptr_t *to;
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volatile uintptr_t *from;
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@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.
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$FreeBSD$
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***************************************************************************/
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#ifndef _myri10ge_mcp_h
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#define _myri10ge_mcp_h
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#ifndef _mxge_mcp_h
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#define _mxge_mcp_h
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#ifdef MYRI10GE_MCP
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#ifdef MXGE_MCP
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typedef signed char int8_t;
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typedef signed short int16_t;
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typedef signed int int32_t;
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@ -98,22 +98,22 @@ typedef struct
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The PADDED flags is set if the packet needs to be padded, and it
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must be set for all segments.
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The MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative
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The MXGE_MCP_ETHER_FLAGS_ALIGN_ODD must be set if the cumulative
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length of all previous segments was odd.
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*/
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#define MYRI10GE_MCP_ETHER_FLAGS_VALID 0x1
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#define MYRI10GE_MCP_ETHER_FLAGS_FIRST 0x2
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#define MYRI10GE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4
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#define MYRI10GE_MCP_ETHER_FLAGS_CKSUM 0x8
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#define MYRI10GE_MCP_ETHER_FLAGS_SMALL 0x10
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#define MYRI10GE_MCP_ETHER_FLAGS_NOT_LAST 0x100
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#define MYRI10GE_MCP_ETHER_FLAGS_TSO_HDR 0x200
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#define MYRI10GE_MCP_ETHER_FLAGS_TSO 0x400
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#define MXGE_MCP_ETHER_FLAGS_VALID 0x1
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#define MXGE_MCP_ETHER_FLAGS_FIRST 0x2
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#define MXGE_MCP_ETHER_FLAGS_ALIGN_ODD 0x4
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#define MXGE_MCP_ETHER_FLAGS_CKSUM 0x8
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#define MXGE_MCP_ETHER_FLAGS_SMALL 0x10
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#define MXGE_MCP_ETHER_FLAGS_NOT_LAST 0x100
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#define MXGE_MCP_ETHER_FLAGS_TSO_HDR 0x200
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#define MXGE_MCP_ETHER_FLAGS_TSO 0x400
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#define MYRI10GE_MCP_ETHER_SEND_SMALL_SIZE 1520
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#define MYRI10GE_MCP_ETHER_MAX_MTU 9400
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#define MXGE_MCP_ETHER_SEND_SMALL_SIZE 1520
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#define MXGE_MCP_ETHER_MAX_MTU 9400
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typedef union mcp_pso_or_cumlen
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{
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@ -121,8 +121,8 @@ typedef union mcp_pso_or_cumlen
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uint16_t cum_len;
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} mcp_pso_or_cumlen_t;
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#define MYRI10GE_MCP_ETHER_MAX_SEND_DESC 12
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#define MYRI10GE_MCP_ETHER_PAD 2
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#define MXGE_MCP_ETHER_MAX_SEND_DESC 12
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#define MXGE_MCP_ETHER_PAD 2
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/* 16 Bytes */
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typedef struct
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@ -146,63 +146,63 @@ typedef struct
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/* Commands */
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#define MYRI10GE_MCP_CMD_OFFSET 0xf80000
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#define MXGE_MCP_CMD_OFFSET 0xf80000
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typedef enum {
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MYRI10GE_MCP_CMD_NONE = 0,
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MXGE_MCP_CMD_NONE = 0,
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/* Reset the mcp, it is left in a safe state, waiting
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for the driver to set all its parameters */
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MYRI10GE_MCP_CMD_RESET,
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MXGE_MCP_CMD_RESET,
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/* get the version number of the current firmware..
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(may be available in the eeprom strings..? */
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MYRI10GE_MCP_GET_MCP_VERSION,
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MXGE_MCP_GET_MCP_VERSION,
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/* Parameters which must be set by the driver before it can
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issue MYRI10GE_MCP_CMD_ETHERNET_UP. They persist until the next
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MYRI10GE_MCP_CMD_RESET is issued */
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issue MXGE_MCP_CMD_ETHERNET_UP. They persist until the next
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MXGE_MCP_CMD_RESET is issued */
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MYRI10GE_MCP_CMD_SET_INTRQ0_DMA,
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MYRI10GE_MCP_CMD_SET_INTRQ1_DMA,
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MYRI10GE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
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MYRI10GE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
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MXGE_MCP_CMD_SET_INTRQ0_DMA,
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MXGE_MCP_CMD_SET_INTRQ1_DMA,
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MXGE_MCP_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
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MXGE_MCP_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
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/* Parameters which refer to lanai SRAM addresses where the
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driver must issue PIO writes for various things */
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MYRI10GE_MCP_CMD_GET_SEND_OFFSET,
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MYRI10GE_MCP_CMD_GET_SMALL_RX_OFFSET,
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MYRI10GE_MCP_CMD_GET_BIG_RX_OFFSET,
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MYRI10GE_MCP_CMD_GET_IRQ_ACK_OFFSET,
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MYRI10GE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET,
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MYRI10GE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET,
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MXGE_MCP_CMD_GET_SEND_OFFSET,
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MXGE_MCP_CMD_GET_SMALL_RX_OFFSET,
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MXGE_MCP_CMD_GET_BIG_RX_OFFSET,
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MXGE_MCP_CMD_GET_IRQ_ACK_OFFSET,
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MXGE_MCP_CMD_GET_IRQ_DEASSERT_OFFSET,
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MXGE_MCP_CMD_GET_IRQ_ACK_DEASSERT_OFFSET,
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/* Parameters which refer to rings stored on the MCP,
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and whose size is controlled by the mcp */
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MYRI10GE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */
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MYRI10GE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */
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MXGE_MCP_CMD_GET_SEND_RING_SIZE, /* in bytes */
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MXGE_MCP_CMD_GET_RX_RING_SIZE, /* in bytes */
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/* Parameters which refer to rings stored in the host,
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and whose size is controlled by the host. Note that
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all must be physically contiguous and must contain
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a power of 2 number of entries. */
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MYRI10GE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */
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MXGE_MCP_CMD_SET_INTRQ_SIZE, /* in bytes */
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/* command to bring ethernet interface up. Above parameters
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(plus mtu & mac address) must have been exchanged prior
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to issuing this command */
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MYRI10GE_MCP_CMD_ETHERNET_UP,
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MXGE_MCP_CMD_ETHERNET_UP,
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/* command to bring ethernet interface down. No further sends
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or receives may be processed until an MYRI10GE_MCP_CMD_ETHERNET_UP
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or receives may be processed until an MXGE_MCP_CMD_ETHERNET_UP
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is issued, and all interrupt queues must be flushed prior
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to ack'ing this command */
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MYRI10GE_MCP_CMD_ETHERNET_DOWN,
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MXGE_MCP_CMD_ETHERNET_DOWN,
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/* commands the driver may issue live, without resetting
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the nic. Note that increasing the mtu "live" should
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@ -210,41 +210,41 @@ typedef enum {
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sufficiently large to handle the new mtu. Decreasing
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the mtu live is safe */
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MYRI10GE_MCP_CMD_SET_MTU,
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MYRI10GE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */
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MYRI10GE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */
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MYRI10GE_MCP_CMD_SET_STATS_DMA,
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MXGE_MCP_CMD_SET_MTU,
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MXGE_MCP_CMD_SET_INTR_COAL_DELAY, /* in microseconds */
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MXGE_MCP_CMD_SET_STATS_INTERVAL, /* in microseconds */
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MXGE_MCP_CMD_SET_STATS_DMA,
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MYRI10GE_MCP_ENABLE_PROMISC,
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MYRI10GE_MCP_DISABLE_PROMISC,
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MYRI10GE_MCP_SET_MAC_ADDRESS,
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MXGE_MCP_ENABLE_PROMISC,
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MXGE_MCP_DISABLE_PROMISC,
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MXGE_MCP_SET_MAC_ADDRESS,
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MYRI10GE_MCP_ENABLE_FLOW_CONTROL,
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MYRI10GE_MCP_DISABLE_FLOW_CONTROL
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} myri10ge_mcp_cmd_type_t;
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MXGE_MCP_ENABLE_FLOW_CONTROL,
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MXGE_MCP_DISABLE_FLOW_CONTROL
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} mxge_mcp_cmd_type_t;
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typedef enum {
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MYRI10GE_MCP_CMD_OK = 0,
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MYRI10GE_MCP_CMD_UNKNOWN,
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MYRI10GE_MCP_CMD_ERROR_RANGE,
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MYRI10GE_MCP_CMD_ERROR_BUSY,
|
||||
MYRI10GE_MCP_CMD_ERROR_EMPTY,
|
||||
MYRI10GE_MCP_CMD_ERROR_CLOSED,
|
||||
MYRI10GE_MCP_CMD_ERROR_HASH_ERROR,
|
||||
MYRI10GE_MCP_CMD_ERROR_BAD_PORT,
|
||||
MYRI10GE_MCP_CMD_ERROR_RESOURCES
|
||||
} myri10ge_mcp_cmd_status_t;
|
||||
MXGE_MCP_CMD_OK = 0,
|
||||
MXGE_MCP_CMD_UNKNOWN,
|
||||
MXGE_MCP_CMD_ERROR_RANGE,
|
||||
MXGE_MCP_CMD_ERROR_BUSY,
|
||||
MXGE_MCP_CMD_ERROR_EMPTY,
|
||||
MXGE_MCP_CMD_ERROR_CLOSED,
|
||||
MXGE_MCP_CMD_ERROR_HASH_ERROR,
|
||||
MXGE_MCP_CMD_ERROR_BAD_PORT,
|
||||
MXGE_MCP_CMD_ERROR_RESOURCES
|
||||
} mxge_mcp_cmd_status_t;
|
||||
|
||||
typedef enum {
|
||||
MYRI10GE_MCP_INTR_NONE = 0,
|
||||
MYRI10GE_MCP_INTR_ETHER_SEND_DONE,
|
||||
MYRI10GE_MCP_INTR_ETHER_RECV_SMALL,
|
||||
MYRI10GE_MCP_INTR_ETHER_RECV_BIG,
|
||||
MYRI10GE_MCP_INTR_LINK_CHANGE,
|
||||
MYRI10GE_MCP_INTR_STATS_UPDATE,
|
||||
MYRI10GE_MCP_INTR_ETHER_DOWN
|
||||
} myri10ge_mcp_intr_type_t;
|
||||
MXGE_MCP_INTR_NONE = 0,
|
||||
MXGE_MCP_INTR_ETHER_SEND_DONE,
|
||||
MXGE_MCP_INTR_ETHER_RECV_SMALL,
|
||||
MXGE_MCP_INTR_ETHER_RECV_BIG,
|
||||
MXGE_MCP_INTR_LINK_CHANGE,
|
||||
MXGE_MCP_INTR_STATS_UPDATE,
|
||||
MXGE_MCP_INTR_ETHER_DOWN
|
||||
} mxge_mcp_intr_type_t;
|
||||
|
||||
|
||||
/* 32 Bytes */
|
||||
@ -262,4 +262,4 @@ typedef struct
|
||||
} mcp_stats_t;
|
||||
|
||||
|
||||
#endif /* _myri10ge_mcp_h */
|
||||
#endif /* _mxge_mcp_h */
|
||||
|
@ -160,6 +160,7 @@ SUBDIR= ${_3dfx} \
|
||||
msdosfs \
|
||||
msdosfs_iconv \
|
||||
${_mse} \
|
||||
${_mxge} \
|
||||
my \
|
||||
${_ncp} \
|
||||
${_ncv} \
|
||||
@ -413,6 +414,7 @@ _ips= ips
|
||||
_ipw= ipw
|
||||
_iwi= iwi
|
||||
_mly= mly
|
||||
_mxge= mxge
|
||||
_nve= nve
|
||||
.if ${MK_CRYPT} != "no" || defined(ALL_MODULES)
|
||||
.if exists(${.CURDIR}/../crypto/via)
|
||||
@ -469,6 +471,7 @@ _ips= ips
|
||||
_ipw= ipw
|
||||
_iwi= iwi
|
||||
_mly= mly
|
||||
_mxge= mxge
|
||||
_ndis= ndis
|
||||
_nve= nve
|
||||
_pccard= pccard
|
||||
|
@ -1,7 +1,7 @@
|
||||
# $FreeBSD$
|
||||
|
||||
SUBDIR= myri10ge
|
||||
SUBDIR+=myri10ge_eth_z8e
|
||||
SUBDIR+=myri10ge_ethp_z8e
|
||||
SUBDIR= mxge
|
||||
SUBDIR+=mxge_eth_z8e
|
||||
SUBDIR+=mxge_ethp_z8e
|
||||
|
||||
.include <bsd.subdir.mk>
|
||||
|
@ -1,8 +1,8 @@
|
||||
#$FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../../dev/myri10ge
|
||||
.PATH: ${.CURDIR}/../../../dev/mxge
|
||||
|
||||
KMOD= if_myri10ge
|
||||
SRCS= if_myri10ge.c device_if.h bus_if.h pci_if.h
|
||||
KMOD= if_mxge
|
||||
SRCS= if_mxge.c device_if.h bus_if.h pci_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
@ -1,13 +1,13 @@
|
||||
# $FreeBSD$
|
||||
|
||||
MYRI10GE= ${.CURDIR}/../../../dev/myri10ge
|
||||
.PATH= ${MYRI10GE}
|
||||
KMOD= myri10ge_eth_z8e
|
||||
FIRMWS= eth_z8e.dat:myri10ge_eth_z8e
|
||||
MXGE= ${.CURDIR}/../../../dev/mxge
|
||||
.PATH= ${MXGE}
|
||||
KMOD= mxge_eth_z8e
|
||||
FIRMWS= eth_z8e.dat:mxge_eth_z8e
|
||||
CLEANFILES+= eth_z8e.dat
|
||||
|
||||
eth_z8e.dat: ${MYRI10GE}/eth_z8e.dat.gz.uu
|
||||
uudecode -p < ${MYRI10GE}/eth_z8e.dat.gz.uu \
|
||||
eth_z8e.dat: ${MXGE}/eth_z8e.dat.gz.uu
|
||||
uudecode -p < ${MXGE}/eth_z8e.dat.gz.uu \
|
||||
| gzip -dc > ${.TARGET}
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
@ -1,13 +1,13 @@
|
||||
# $FreeBSD$
|
||||
|
||||
MYRI10GE= ${.CURDIR}/../../../dev/myri10ge
|
||||
.PATH= ${MYRI10GE}
|
||||
KMOD= myri10ge_ethp_z8e
|
||||
FIRMWS= ethp_z8e.dat:myri10ge_ethp_z8e
|
||||
MXGE= ${.CURDIR}/../../../dev/mxge
|
||||
.PATH= ${MXGE}
|
||||
KMOD= mxge_ethp_z8e
|
||||
FIRMWS= ethp_z8e.dat:mxge_ethp_z8e
|
||||
CLEANFILES+= ethp_z8e.dat
|
||||
|
||||
ethp_z8e.dat: ${MYRI10GE}/ethp_z8e.dat.gz.uu
|
||||
uudecode -p < ${MYRI10GE}/ethp_z8e.dat.gz.uu \
|
||||
ethp_z8e.dat: ${MXGE}/ethp_z8e.dat.gz.uu
|
||||
uudecode -p < ${MXGE}/ethp_z8e.dat.gz.uu \
|
||||
| gzip -dc > ${.TARGET}
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
Loading…
Reference in New Issue
Block a user