ig4(4): Add PCI IDs for Intel Bay Trail I2C controllers.
PR: 245654 Reported by: <xspbe3ho3p5uac@protonmail.com> MFC after: 1 week
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=360355
@ -66,6 +66,13 @@ __FBSDID("$FreeBSD$");
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static int ig4iic_pci_detach(device_t dev);
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#define PCI_CHIP_BAYTRAIL_I2C_1 0x0f418086
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#define PCI_CHIP_BAYTRAIL_I2C_2 0x0f428086
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#define PCI_CHIP_BAYTRAIL_I2C_3 0x0f438086
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#define PCI_CHIP_BAYTRAIL_I2C_4 0x0f448086
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#define PCI_CHIP_BAYTRAIL_I2C_5 0x0f458086
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#define PCI_CHIP_BAYTRAIL_I2C_6 0x0f468086
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#define PCI_CHIP_BAYTRAIL_I2C_7 0x0f478086
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#define PCI_CHIP_LYNXPT_LP_I2C_1 0x9c618086
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#define PCI_CHIP_LYNXPT_LP_I2C_2 0x9c628086
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#define PCI_CHIP_BRASWELL_I2C_1 0x22c18086
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@ -108,6 +115,13 @@ struct ig4iic_pci_device {
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};
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static struct ig4iic_pci_device ig4iic_pci_devices[] = {
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{ PCI_CHIP_BAYTRAIL_I2C_1, "Intel BayTrail Serial I/O I2C Port 1", IG4_ATOM},
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{ PCI_CHIP_BAYTRAIL_I2C_2, "Intel BayTrail Serial I/O I2C Port 2", IG4_ATOM},
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{ PCI_CHIP_BAYTRAIL_I2C_3, "Intel BayTrail Serial I/O I2C Port 3", IG4_ATOM},
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{ PCI_CHIP_BAYTRAIL_I2C_4, "Intel BayTrail Serial I/O I2C Port 4", IG4_ATOM},
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{ PCI_CHIP_BAYTRAIL_I2C_5, "Intel BayTrail Serial I/O I2C Port 5", IG4_ATOM},
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{ PCI_CHIP_BAYTRAIL_I2C_6, "Intel BayTrail Serial I/O I2C Port 6", IG4_ATOM},
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{ PCI_CHIP_BAYTRAIL_I2C_7, "Intel BayTrail Serial I/O I2C Port 7", IG4_ATOM},
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{ PCI_CHIP_LYNXPT_LP_I2C_1, "Intel Lynx Point-LP I2C Controller-1", IG4_HASWELL},
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{ PCI_CHIP_LYNXPT_LP_I2C_2, "Intel Lynx Point-LP I2C Controller-2", IG4_HASWELL},
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{ PCI_CHIP_BRASWELL_I2C_1, "Intel Braswell Serial I/O I2C Port 1", IG4_ATOM},
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