Enable the D-cache and I-cache when not already enabled.

It so happens that U-Boot disables the D-cache when booting
an ELF image, so this change makes sure we run with the
D-cache enabled from now on. It shows too...

While here, remove the duplicate definition of the hw.model
sysctl.
This commit is contained in:
Marcel Moolenaar 2008-03-08 05:36:25 +00:00
parent 979690601e
commit 704bb9b36f
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=176928

View File

@ -158,6 +158,11 @@ extern void *trapcode, *trapsize;
extern unsigned char kstack0_space[];
extern void dcache_enable(void);
extern void dcache_inval(void);
extern void icache_enable(void);
extern void icache_inval(void);
struct kva_md_info kmi;
struct pcpu __pcpu[MAXCPU];
struct trapframe frame0;
@ -170,9 +175,6 @@ struct bootinfo *bootinfo;
char machine[] = "powerpc";
SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
static char model[128];
SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, model, 0, "");
static int cacheline_size = CACHELINESIZE;
SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
CTLFLAG_RD, &cacheline_size, 0, "");
@ -318,6 +320,7 @@ e500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp)
void *kmdp;
vm_offset_t end;
struct bi_mem_region *mr;
uint32_t csr;
int i;
kmdp = NULL;
@ -440,6 +443,28 @@ e500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp)
mtmsr(mfmsr() | PSL_ME);
isync();
/* Enable D-cache if applicable */
csr = mfspr(SPR_L1CSR0);
if ((csr & L1CSR0_DCE) == 0) {
dcache_inval();
dcache_enable();
}
csr = mfspr(SPR_L1CSR0);
if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0)
printf("L1 D-cache %sabled\n",
(csr & L1CSR0_DCE) ? "en" : "dis");
/* Enable L1 I-cache if applicable. */
csr = mfspr(SPR_L1CSR1);
if ((csr & L1CSR1_ICE) == 0) {
icache_inval();
icache_enable();
}
csr = mfspr(SPR_L1CSR1);
if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0)
printf("L1 I-cache %sabled\n",
(csr & L1CSR1_ICE) ? "en" : "dis");
debugf("e500_init: e\n");
}