ofw_spi: Parse property for the SPI mode and CS polarity.

As cs is stored in a uint32_t, use the last bit to store the
active high flag as it's unlikely that we will have that much CS.

Reviewed by:	loos
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D8614

sys/arm/at91/at91_spi.c

@@ -301,6 +301,8 @@ at91_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	sc = device_get_softc(dev);
 	i = 0;
 

sys/arm/broadcom/bcm2835/bcm2835_spi.c

@@ -433,6 +433,9 @@ bcm_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	/* Get the proper chip select for this child. */
 	spibus_get_cs(child, &cs);
+
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs > 2) {
 		device_printf(dev,
 		    "Invalid chip select %d requested by %s\n", cs,

sys/arm/freescale/vybrid/vf_spi.c

@@ -262,6 +262,8 @@ spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Command */
 	spi_txrx(sc, cmd->tx_cmd, cmd->rx_cmd, cmd->tx_cmd_sz, cs);
 

sys/arm/lpc/lpc_spi.c

@@ -147,6 +147,8 @@ lpc_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Set CS active */
 	lpc_gpio_set_state(child, cs, 0);
 

sys/arm/samsung/exynos/exynos5_spi.c

@@ -204,6 +204,8 @@ spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Command */
 	spi_txrx(sc, cmd->tx_cmd, cmd->rx_cmd, cmd->tx_cmd_sz, cs);
 

sys/arm/ti/ti_spi.c

@@ -457,6 +457,9 @@ ti_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	/* Get the proper chip select for this child. */
 	spibus_get_cs(child, &cs);
+
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs > sc->sc_numcs) {
 		device_printf(dev, "Invalid chip select %d requested by %s\n",
 		    cs, device_get_nameunit(child));

sys/dev/spibus/ofw_spibus.c

@@ -80,6 +80,7 @@ ofw_spibus_attach(device_t dev)
 	phandle_t child;
 	pcell_t clock, paddr;
 	device_t childdev;
+	uint32_t mode = SPIBUS_MODE_NONE;
 
 	sc->dev = dev;
 
@@ -102,6 +103,24 @@ ofw_spibus_attach(device_t dev)
 				continue;
 		}
 
+		/*
+		 * Try to get the cpol/cpha mode
+		 */
+		if (OF_hasprop(child, "spi-cpol"))
+			mode = SPIBUS_MODE_CPOL;
+		if (OF_hasprop(child, "spi-cpha")) {
+			if (mode == SPIBUS_MODE_CPOL)
+				mode = SPIBUS_MODE_CPOL_CPHA;
+			else
+				mode = SPIBUS_MODE_CPHA;
+		}
+
+		/*
+		 * Try to get the CS polarity
+		 */
+		if (OF_hasprop(child, "spi-cs-high"))
+			paddr |= SPIBUS_CS_HIGH;
+
 		/*
 		 * Get the maximum clock frequency for device, zero means
 		 * use the default bus speed.
@@ -120,6 +139,7 @@ ofw_spibus_attach(device_t dev)
 			continue;
 		dinfo->opd_dinfo.cs = paddr;
 		dinfo->opd_dinfo.clock = clock;
+		dinfo->opd_dinfo.mode = mode;
 		if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
 		    0) {
 			free(dinfo, M_DEVBUF);

sys/dev/spibus/spibusvar.h

@@ -46,6 +46,8 @@ struct spibus_ivar
 	uint32_t	clock;
 };
 
+#define	SPIBUS_CS_HIGH	(1U << 31)
+
 enum {
 	SPIBUS_IVAR_CS,		/* chip select that we're on */
 	SPIBUS_IVAR_MODE,	/* SPI mode (0-3) */

sys/dev/xilinx/axi_quad_spi.c

@@ -193,6 +193,8 @@ spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 	/* get the proper chip select */
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Assert CS */
 	reg = READ4(sc, SPI_SSR);
 	reg &= ~(1 << cs);

sys/mips/atheros/ar531x/ar5315_spi.c

@@ -166,6 +166,8 @@ ar5315_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	/* Open SPI controller interface */
 	ar5315_spi_chip_activate(sc, cs);
 

sys/mips/atheros/ar71xx_spi.c

@@ -212,6 +212,8 @@ ar71xx_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	ar71xx_spi_chip_activate(sc, cs);
 
 	KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz, 

sys/mips/mediatek/mtk_spi_v1.c

@@ -231,6 +231,8 @@ mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs != 0)
 		/* Only 1 CS */
 		return (ENXIO);

sys/mips/mediatek/mtk_spi_v2.c

@@ -236,6 +236,8 @@ mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs != 0)
 		/* Only 1 CS */
 		return (ENXIO);

sys/mips/rt305x/rt305x_spi.c

@@ -226,6 +226,8 @@ rt305x_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 
 	spibus_get_cs(child, &cs);
 
+	cs &= ~SPIBUS_CS_HIGH;
+
 	if (cs != 0)
 		/* Only 1 CS */
 		return (ENXIO);