MFC r208081,208083:
r208081: Controller updates RFA via DMA so driver needs synchronization. Add missing BUS_DMASYNC_POSTWRITE and BUS_DMASYNC_PREREAD. r208083: Dont' allow dma map load deferring. fxp(4) is not able to handle EINPROGRESS.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/stable/8/; revision=208314
@ -1899,7 +1899,7 @@ fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, uint8_t statack,
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rfa = (struct fxp_rfa *)(m->m_ext.ext_buf +
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RFA_ALIGNMENT_FUDGE);
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bus_dmamap_sync(sc->fxp_rxmtag, rxp->rx_map,
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BUS_DMASYNC_POSTREAD);
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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#ifdef DEVICE_POLLING /* loop at most count times if count >=0 */
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if (count >= 0 && count-- == 0) {
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@ -2623,7 +2623,7 @@ fxp_new_rfabuf(struct fxp_softc *sc, struct fxp_rx *rxp)
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/* Map the RFA into DMA memory. */
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error = bus_dmamap_load(sc->fxp_rxmtag, sc->spare_map, rfa,
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MCLBYTES - RFA_ALIGNMENT_FUDGE, fxp_dma_map_addr,
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&rxp->rx_addr, 0);
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&rxp->rx_addr, BUS_DMA_NOWAIT);
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if (error) {
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m_freem(m);
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return (error);
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@ -2659,7 +2659,7 @@ fxp_add_rfabuf(struct fxp_softc *sc, struct fxp_rx *rxp)
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le32enc(&p_rfa->link_addr, rxp->rx_addr);
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p_rfa->rfa_control = 0;
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bus_dmamap_sync(sc->fxp_rxmtag, p_rx->rx_map,
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BUS_DMASYNC_PREWRITE);
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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} else {
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rxp->rx_next = NULL;
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sc->fxp_desc.rx_head = rxp;
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