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sfxge(4): add the max number of RSS exclusive contexts

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The patch adds enc_rx_scale_max_exclusive_contexts member
to nic_cfg_t structure and sets the corresponding values
for Siena, Huntington and Medford

Submitted by:   Mark Spender <mspender at solarflare.com>
Sponsored by:   Solarflare Communications, Inc.
Differential Revision:  https://reviews.freebsd.org/D18077
This commit is contained in:
Andrew Rybchenko 2018-11-23 09:15:08 +00:00
parent 7ae12f5b45
commit 7283cea3c5
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=340807
4 changed files with 18 additions and 0 deletions
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1
sys/dev/sfxge/common/efx.h
View File

@ -1134,6 +1134,7 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_rx_prefix_size;
uint32_t enc_rx_buf_align_start;
uint32_t enc_rx_buf_align_end;
uint32_t enc_rx_scale_max_exclusive_contexts;
#if EFSYS_OPT_LOOPBACK
efx_qword_t enc_loopback_types[EFX_LINK_NMODES];
#endif /* EFSYS_OPT_LOOPBACK */

7
sys/dev/sfxge/common/hunt_nic.c
View File

@ -304,6 +304,13 @@ hunt_board_cfg(
/* Alignment for WPTR updates */
encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
/*
* Maximum number of exclusive RSS contexts which can be allocated. The
* hardware supports 64, but 6 are reserved for shared contexts. They
* are a global resource so not all may be available.
*/
encp->enc_rx_scale_max_exclusive_contexts = 58;
encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
/* No boundary crossing limits */
encp->enc_tx_dma_desc_boundary = 0;

7
sys/dev/sfxge/common/medford_nic.c
View File

@ -301,6 +301,13 @@ medford_board_cfg(
/* Alignment for WPTR updates */
encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
/*
* Maximum number of exclusive RSS contexts which can be allocated. The
* hardware supports 64, but 6 are reserved for shared contexts. They
* are a global resource so not all may be available.
*/
encp->enc_rx_scale_max_exclusive_contexts = 58;
encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
/* No boundary crossing limits */
encp->enc_tx_dma_desc_boundary = 0;

3
sys/dev/sfxge/common/siena_nic.c
View File

@ -140,6 +140,9 @@ siena_board_cfg(
/* Alignment for WPTR updates */
encp->enc_rx_push_align = 1;
/* There is one RSS context per function */
encp->enc_rx_scale_max_exclusive_contexts = 1;
encp->enc_tx_dma_desc_size_max = EFX_MASK32(FSF_AZ_TX_KER_BYTE_COUNT);
/* Fragments must not span 4k boundaries. */
encp->enc_tx_dma_desc_boundary = 4096;