ARM locore cosmetics.
Approved by: cognet (mentor)
This commit is contained in:
parent
e081d0ac19
commit
72c6438b52
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=175983
@ -69,7 +69,7 @@ ASENTRY_NP(_start)
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#if defined (FLASHADDR) && defined(LOADERRAMADDR)
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/* Check if we're running from flash. */
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ldr r7, =FLASHADDR
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/*
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/*
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* If we're running with MMU disabled, test against the
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* physical address instead.
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*/
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@ -88,7 +88,7 @@ flash_lower:
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bls from_ram
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do_copy:
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ldr r9, =KERNBASE
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adr r1, _start
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adr r1, _start
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ldr r0, Lreal_start
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ldr r2, Lend
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sub r2, r2, r0
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@ -105,7 +105,7 @@ from_ram:
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adr r7, Lunmapped
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bic r7, r7, #0xff000000
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orr r7, r7, #PHYSADDR
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disable_mmu:
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/* Disable MMU for a while */
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@ -170,7 +170,7 @@ mmu_done:
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ldr pc, .Lvirt_done
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virt_done:
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mov fp, #0 /* trace back starts here */
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mov fp, #0 /* trace back starts here */
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bl _C_LABEL(initarm) /* Off we go */
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/* init arm will return the new stack pointer. */
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@ -180,7 +180,7 @@ virt_done:
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adr r0, .Lmainreturned
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b _C_LABEL(panic)
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/* NOTEACHED */
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/* NOTREACHED */
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#ifdef STARTUP_PAGETABLE_ADDR
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#define MMU_INIT(va,pa,n_sec,attr) \
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.word n_sec ; \
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@ -229,9 +229,6 @@ svcstk:
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.text
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.align 0
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#ifndef OFW
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/* OFW based systems will used OF_boot() */
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.Lcpufuncs:
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.word _C_LABEL(cpufuncs)
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@ -260,7 +257,7 @@ ENTRY_NP(cpu_halt)
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mov r2, #0
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/*
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* MMU & IDC off, 32 bit program & data space
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* MMU & IDC off, 32 bit program & data space
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* Hurl ourselves into the ROM
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*/
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mov r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
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@ -285,7 +282,6 @@ ENTRY_NP(cpu_halt)
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.Lcpu_reset_needs_v4_MMU_disable:
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.word _C_LABEL(cpu_reset_needs_v4_MMU_disable)
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#endif /* OFW */
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#ifdef IPKDB
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/*
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