- Cross-reference new manual pages.
- Spell new PMC class names correctly.
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2020-12-20 02:59:44 +00:00
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@ -185,15 +185,15 @@ PMC supported by this library are named by the
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.Vt enum pmc_class
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enumeration.
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Supported PMC kinds include:
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.Bl -tag -width "Li PMC_CLASS_IA_FIXED" -compact
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.It Li PMC_CLASS_IA
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Programmable hardware counters present in CPUs conforming to the
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.Tn Intel
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performance measurement architecture version 1 and later.
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.It Li PMC_CLASS_IA_FIXED
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.Bl -tag -width "Li PMC_CLASS_IAF" -compact
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.It Li PMC_CLASS_IAF
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Fixed function hardwre counters presents in CPUs conforming to the
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.Tn Intel
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performance measurement architecture version 2 and later.
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.It Li PMC_CLASS_IAP
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Programmable hardware counters present in CPUs conforming to the
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.Tn Intel
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performance measurement architecture version 1 and later.
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.It Li PMC_CLASS_K7
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Programmable hardware counters present in
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.Tn "AMD Athlon"
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@ -474,10 +474,12 @@ or sleep state.
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.El
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.Pp
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.Ss PMC Architecture Dependent Events
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PMC architecture dependent event specifiers are described in their own
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individual manual pages:
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PMC architecture dependent event specifiers are described in the
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following manual pages:
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.Bl -column " PMC_CLASS_TSC " "MANUAL PAGE "
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.It Em "PMC Class" Ta Em "Manual Page"
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.It Li PMC_CLASS_IAF Ta Xr pmc.iaf 3
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.It Li PMC_CLASS_IAP Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3
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.It Li PMC_CLASS_K7 Ta Xr pmc.k7 3
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.It Li PMC_CLASS_K8 Ta Xr pmc.k8 3
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.It Li PMC_CLASS_P4 Ta Xr pmc.p4 3
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@ -503,6 +505,10 @@ The
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API is
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.Ud
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.Sh SEE ALSO
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.Xr pmc.atom 3 ,
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.Xr pmc.core 3 ,
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.Xr pmc.core2 3 ,
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.Xr pmc.iaf 3 ,
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.Xr pmc.k7 3 ,
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.Xr pmc.k8 3 ,
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.Xr pmc.p4 3 ,
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