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The MDIO control register for the AR8327 has a different address to

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previous chipsets.

Obtained from:	AR8327 datasheet
This commit is contained in:
Adrian Chadd 2014-02-17 05:54:24 +00:00
parent 1ee69b7d79
commit 7307fbd10b
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=262016
1 changed files with 2 additions and 0 deletions
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2
sys/dev/etherswitch/arswitch/arswitchreg.h
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@ -395,6 +395,8 @@
#define AR8327_REG_MIB_FUNC 0x034
#define AR8327_MIB_CPU_KEEP (1 << 20)
#define AR8327_REG_MDIO_CTRL 0x03c
#define AR8327_REG_SERVICE_TAG 0x048
#define AR8327_REG_LED_CTRL0 0x050
#define AR8327_REG_LED_CTRL1 0x054