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Add additional cpuid feature flags and put into a canonical format.

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MFC after:	1 week
This commit is contained in:
Mark Peek 2002-06-22 23:00:33 +00:00
parent 5e5d87ff36
commit 73cb22707a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=98650
2 changed files with 66 additions and 36 deletions
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47
sys/amd64/include/specialreg.h
View File

@ -77,24 +77,39 @@
/*
* CPUID instruction features register
*/
#define CPUID_FPU 0x0001
#define CPUID_VME 0x0002
#define CPUID_DE 0x0004
#define CPUID_PSE 0x0008
#define CPUID_TSC 0x0010
#define CPUID_MSR 0x0020
#define CPUID_PAE 0x0040
#define CPUID_MCE 0x0080
#define CPUID_CX8 0x0100
#define CPUID_APIC 0x0200
#define CPUID_B10 0x0400
#define CPUID_B11 0x0800
#define CPUID_MTRR 0x1000
#define CPUID_PGE 0x2000
#define CPUID_MCA 0x4000
#define CPUID_CMOV 0x8000
#define CPUID_FPU 0x00000001
#define CPUID_VME 0x00000002
#define CPUID_DE 0x00000004
#define CPUID_PSE 0x00000008
#define CPUID_TSC 0x00000010
#define CPUID_MSR 0x00000020
#define CPUID_PAE 0x00000040
#define CPUID_MCE 0x00000080
#define CPUID_CX8 0x00000100
#define CPUID_APIC 0x00000200
#define CPUID_B10 0x00000400
#define CPUID_SEP 0x00000800
#define CPUID_MTRR 0x00001000
#define CPUID_PGE 0x00002000
#define CPUID_MCA 0x00004000
#define CPUID_CMOV 0x00008000
#define CPUID_PAT 0x00010000
#define CPUID_PSE36 0x00020000
#define CPUID_PSN 0x00040000
#define CPUID_CLFSH 0x00080000
#define CPUID_B20 0x00100000
#define CPUID_DS 0x00200000
#define CPUID_ACPI 0x00400000
#define CPUID_MMX 0x00800000
#define CPUID_FXSR 0x01000000
#define CPUID_SSE 0x02000000
#define CPUID_XMM 0x02000000
#define CPUID_SSE2 0x04000000
#define CPUID_SS 0x08000000
#define CPUID_HHT 0x10000000
#define CPUID_TM 0x20000000
#define CPUID_B30 0x40000000
#define CPUID_PBE 0x80000000
/*
* Model-specific registers for the i386 family

47
sys/i386/include/specialreg.h
View File

@ -77,24 +77,39 @@
/*
* CPUID instruction features register
*/
#define CPUID_FPU 0x0001
#define CPUID_VME 0x0002
#define CPUID_DE 0x0004
#define CPUID_PSE 0x0008
#define CPUID_TSC 0x0010
#define CPUID_MSR 0x0020
#define CPUID_PAE 0x0040
#define CPUID_MCE 0x0080
#define CPUID_CX8 0x0100
#define CPUID_APIC 0x0200
#define CPUID_B10 0x0400
#define CPUID_B11 0x0800
#define CPUID_MTRR 0x1000
#define CPUID_PGE 0x2000
#define CPUID_MCA 0x4000
#define CPUID_CMOV 0x8000
#define CPUID_FPU 0x00000001
#define CPUID_VME 0x00000002
#define CPUID_DE 0x00000004
#define CPUID_PSE 0x00000008
#define CPUID_TSC 0x00000010
#define CPUID_MSR 0x00000020
#define CPUID_PAE 0x00000040
#define CPUID_MCE 0x00000080
#define CPUID_CX8 0x00000100
#define CPUID_APIC 0x00000200
#define CPUID_B10 0x00000400
#define CPUID_SEP 0x00000800
#define CPUID_MTRR 0x00001000
#define CPUID_PGE 0x00002000
#define CPUID_MCA 0x00004000
#define CPUID_CMOV 0x00008000
#define CPUID_PAT 0x00010000
#define CPUID_PSE36 0x00020000
#define CPUID_PSN 0x00040000
#define CPUID_CLFSH 0x00080000
#define CPUID_B20 0x00100000
#define CPUID_DS 0x00200000
#define CPUID_ACPI 0x00400000
#define CPUID_MMX 0x00800000
#define CPUID_FXSR 0x01000000
#define CPUID_SSE 0x02000000
#define CPUID_XMM 0x02000000
#define CPUID_SSE2 0x04000000
#define CPUID_SS 0x08000000
#define CPUID_HHT 0x10000000
#define CPUID_TM 0x20000000
#define CPUID_B30 0x40000000
#define CPUID_PBE 0x80000000
/*
* Model-specific registers for the i386 family