Chipset support for the new Intel Panther Point PCH, thanks

to Seth Heasley for preparing the changes.
This commit is contained in:
Jack F Vogel 2011-05-11 20:31:27 +00:00
parent c63e8fe201
commit 73e3bb6563
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=221789
7 changed files with 105 additions and 2 deletions

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@ -164,10 +164,18 @@ static struct {
{0x1c038086, 0x00, "Intel Cougar Point", 0},
{0x1c048086, 0x00, "Intel Cougar Point", 0},
{0x1c058086, 0x00, "Intel Cougar Point", 0},
{0x23238086, 0x00, "Intel DH89xxCC", 0},
{0x1d028086, 0x00, "Intel Patsburg", 0},
{0x1d048086, 0x00, "Intel Patsburg", 0},
{0x1d068086, 0x00, "Intel Patsburg", 0},
{0x1e028086, 0x00, "Intel Panther Point", 0},
{0x1e038086, 0x00, "Intel Panther Point", 0},
{0x1e048086, 0x00, "Intel Panther Point", 0},
{0x1e058086, 0x00, "Intel Panther Point", 0},
{0x1e068086, 0x00, "Intel Panther Point", 0},
{0x1e078086, 0x00, "Intel Panther Point", 0},
{0x1e0e8086, 0x00, "Intel Panther Point", 0},
{0x1e0f8086, 0x00, "Intel Panther Point", 0},
{0x23238086, 0x00, "Intel DH89xxCC", 0},
{0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE},
{0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE},
{0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE},

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@ -233,6 +233,19 @@ struct ata_pci_controller {
#define ATA_PBG_R2 0x1d068086
#define ATA_PBG_S2 0x1d088086
#define ATA_PPT_S1 0x1e008086
#define ATA_PPT_S2 0x1e018086
#define ATA_PPT_AH1 0x1e028086
#define ATA_PPT_AH2 0x1e038086
#define ATA_PPT_R1 0x1e048086
#define ATA_PPT_R2 0x1e058086
#define ATA_PPT_R3 0x1e068086
#define ATA_PPT_R4 0x1e078086
#define ATA_PPT_S3 0x1e088086
#define ATA_PPT_S4 0x1e098086
#define ATA_PPT_R5 0x1e0e8086
#define ATA_PPT_R6 0x1e0f8086
#define ATA_I31244 0x32008086
#define ATA_ISCH 0x811a8086
#define ATA_DH89XXCC 0x23238086

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@ -181,6 +181,18 @@ ata_intel_probe(device_t dev)
{ ATA_PBG_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_S2, 0, INTEL_6CH2, 0, ATA_SA300, "Patsburg" },
{ ATA_PPT_S1, 0, INTEL_6CH, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_S2, 0, INTEL_6CH, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_R3, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_R4, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_R5, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_PPT_R6, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_I31244, 0, 0, 2, ATA_SA150, "31244" },
{ ATA_ISCH, 0, 0, 1, ATA_UDMA5, "SCH" },
{ ATA_DH89XXCC, 0, INTEL_AHCI, 0, ATA_SA300, "DH89xxCC" },

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@ -84,6 +84,7 @@ __FBSDID("$FreeBSD$");
#define ID_DH89XXCC 0x23308086
#define ID_PATSBURG 0x1d228086
#define ID_CPT 0x1c228086
#define ID_PPT 0x1e228086
#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00
@ -186,6 +187,9 @@ ichsmb_pci_probe(device_t dev)
case ID_CPT:
device_set_desc(dev, "Intel Cougar Point SMBus controller");
break;
case ID_PPT:
device_set_desc(dev, "Intel Panther Point SMBus controller");
break;
default:
return (ENXIO);
}

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@ -157,9 +157,41 @@ static struct ichwd_device ichwd_devices[] = {
{ DEVICEID_CPT29, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_CPT30, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_CPT31, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10 },
{ DEVICEID_PATSBURG_LPC1, "Intel Patsburg watchdog timer", 10 },
{ DEVICEID_PATSBURG_LPC2, "Intel Patsburg watchdog timer", 10 },
{ DEVICEID_PPT0, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT1, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT2, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT3, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT4, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT5, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT6, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT7, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT8, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT9, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT10, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT11, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT12, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT13, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT14, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT15, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT16, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT17, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT18, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT19, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT20, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT21, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT22, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT23, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT24, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT25, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT26, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT27, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT28, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT29, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT30, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_PPT31, "Intel Panther Point watchdog timer", 10 },
{ DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10 },
{ 0, NULL, 0 },
};

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@ -99,6 +99,38 @@ struct ichwd_softc {
#define DEVICEID_CPT31 0x1c5f
#define DEVICEID_PATSBURG_LPC1 0x1d40
#define DEVICEID_PATSBURG_LPC2 0x1d41
#define DEVICEID_PPT0 0x1e40
#define DEVICEID_PPT1 0x1e41
#define DEVICEID_PPT2 0x1e42
#define DEVICEID_PPT3 0x1e43
#define DEVICEID_PPT4 0x1e44
#define DEVICEID_PPT5 0x1e45
#define DEVICEID_PPT6 0x1e46
#define DEVICEID_PPT7 0x1e47
#define DEVICEID_PPT8 0x1e48
#define DEVICEID_PPT9 0x1e49
#define DEVICEID_PPT10 0x1e4a
#define DEVICEID_PPT11 0x1e4b
#define DEVICEID_PPT12 0x1e4c
#define DEVICEID_PPT13 0x1e4d
#define DEVICEID_PPT14 0x1e4e
#define DEVICEID_PPT15 0x1e4f
#define DEVICEID_PPT16 0x1e50
#define DEVICEID_PPT17 0x1e51
#define DEVICEID_PPT18 0x1e52
#define DEVICEID_PPT19 0x1e53
#define DEVICEID_PPT20 0x1e54
#define DEVICEID_PPT21 0x1e55
#define DEVICEID_PPT22 0x1e56
#define DEVICEID_PPT23 0x1e57
#define DEVICEID_PPT24 0x1e58
#define DEVICEID_PPT25 0x1e59
#define DEVICEID_PPT26 0x1e5a
#define DEVICEID_PPT27 0x1e5b
#define DEVICEID_PPT28 0x1e5c
#define DEVICEID_PPT29 0x1e5d
#define DEVICEID_PPT30 0x1e5e
#define DEVICEID_PPT31 0x1e5f
#define DEVICEID_DH89XXCC_LPC 0x2310
#define DEVICEID_82801AA 0x2410
#define DEVICEID_82801AB 0x2420

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@ -142,6 +142,7 @@ SND_DECLARE_FILE("$FreeBSD$");
#define INTEL_VENDORID 0x8086
#define HDA_INTEL_CPT HDA_MODEL_CONSTRUCT(INTEL, 0x1c20)
#define HDA_INTEL_PATSBURG HDA_MODEL_CONSTRUCT(INTEL, 0x1d20)
#define HDA_INTEL_PPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x1e20)
#define HDA_INTEL_82801F HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
#define HDA_INTEL_63XXESB HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
#define HDA_INTEL_82801G HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
@ -495,6 +496,7 @@ static const struct {
} hdac_devices[] = {
{ HDA_INTEL_CPT, "Intel Cougar Point", 0 },
{ HDA_INTEL_PATSBURG,"Intel Patsburg", 0 },
{ HDA_INTEL_PPT, "Intel Panther Point", 0 },
{ HDA_INTEL_82801F, "Intel 82801F", 0 },
{ HDA_INTEL_63XXESB, "Intel 631x/632xESB", 0 },
{ HDA_INTEL_82801G, "Intel 82801G", 0 },