peter pointed out that I missed a hard coded location for the memory.

Also add a define for I/O stuff (for cardbus).
This commit is contained in:
Warner Losh 2001-11-26 02:11:22 +00:00
parent f703f3eaee
commit 746509ce98
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=86901

View File

@ -104,6 +104,7 @@
PCIC_WRITE(SC,REG,(PCIC_READ(SC,REG) MASK) MASK2)
#define PCCBB_START_MEM 0x84000000
#define PCCBB_START_IO 0x1000
struct pccbb_sclist {
struct pccbb_softc *sc;
@ -1263,8 +1264,8 @@ pccbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, int *rid,
start = end = tmp;
break;
case SYS_RES_IOPORT:
if (start <= 0x1000)
start = 0x1000;
if (start <= PCCBB_START_IO)
start = PCCBB_START_IO;
if (end < start)
end = start;
break;
@ -1793,8 +1794,8 @@ pccbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
switch (type) {
case SYS_RES_MEMORY:
if (start < 0x10000000)
start = 0x10000000; /* XXX tweakable? */
if (start < PCCBB_START_MEM)
start = PCCBB_START_MEM;
if (end < start)
end = start;
flags = (flags & ~RF_ALIGNMENT_MASK) |