Merging of projects/armv6, part 6
r229271: Import files needed to build ARMADA XP kernel. Submitted by: Grzegorz Bernacki
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75f1438be6
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=239276
@ -104,7 +104,10 @@ static uint32_t mge_rx_ipg(uint32_t val, int ver);
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static void mge_ver_params(struct mge_softc *sc);
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static void mge_intrs_ctrl(struct mge_softc *sc, int enable);
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static void mge_intr_rxtx(void *arg);
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static void mge_intr_rx(void *arg);
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static void mge_intr_rx_check(struct mge_softc *sc, uint32_t int_cause,
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uint32_t int_cause_ext);
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static int mge_intr_rx_locked(struct mge_softc *sc, int count);
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static void mge_intr_tx(void *arg);
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static void mge_intr_tx_locked(struct mge_softc *sc);
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@ -171,15 +174,14 @@ static struct resource_spec res_spec[] = {
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{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
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{ SYS_RES_IRQ, 1, RF_ACTIVE | RF_SHAREABLE },
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{ SYS_RES_IRQ, 2, RF_ACTIVE | RF_SHAREABLE },
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{ SYS_RES_IRQ, 3, RF_ACTIVE | RF_SHAREABLE },
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{ SYS_RES_IRQ, 4, RF_ACTIVE | RF_SHAREABLE },
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{ -1, 0 }
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};
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static struct {
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driver_intr_t *handler;
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char * description;
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} mge_intrs[MGE_INTR_COUNT] = {
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} mge_intrs[MGE_INTR_COUNT + 1] = {
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{ mge_intr_rxtx,"GbE aggregated interrupt" },
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{ mge_intr_rx, "GbE receive interrupt" },
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{ mge_intr_tx, "GbE transmit interrupt" },
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{ mge_intr_misc,"GbE misc interrupt" },
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@ -258,10 +260,11 @@ mge_ver_params(struct mge_softc *sc)
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uint32_t d, r;
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soc_id(&d, &r);
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if (d == MV_DEV_88F6281 ||
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if (d == MV_DEV_88F6281 || d == MV_DEV_88F6781 ||
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d == MV_DEV_88F6282 ||
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d == MV_DEV_MV78100 ||
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d == MV_DEV_MV78100_Z0) {
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d == MV_DEV_MV78100_Z0 ||
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(d & MV_DEV_FAMILY_MASK) == MV_DEV_DISCOVERY) {
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sc->mge_ver = 2;
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sc->mge_mtu = 0x4e8;
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sc->mge_tfut_ipg_max = 0xFFFF;
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@ -278,6 +281,15 @@ mge_ver_params(struct mge_softc *sc)
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sc->mge_tx_tok_cfg = 0x3FFFFFFF;
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sc->mge_tx_tok_cnt = 0x3FFFFFFF;
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}
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if (d == MV_DEV_88RC8180)
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sc->mge_intr_cnt = 1;
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else
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sc->mge_intr_cnt = 2;
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if (d == MV_DEV_MV78160 || d == MV_DEV_MV78260 || d == MV_DEV_MV78460)
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sc->mge_hw_csum = 0;
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else
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sc->mge_hw_csum = 1;
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}
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static void
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@ -442,7 +454,7 @@ mge_alloc_desc_dma(struct mge_softc *sc, struct mge_desc_wrapper* tab,
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/* Allocate a busdma tag for mbufs. */
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error = bus_dma_tag_create(bus_get_dma_tag(sc->dev), /* parent */
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8, 0, /* alignment, boundary */
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1, 0, /* alignment, boundary */
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filtfunc, filtfuncarg */
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@ -681,9 +693,12 @@ mge_attach(device_t dev)
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if_initname(ifp, device_get_name(dev), device_get_unit(dev));
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ifp->if_softc = sc;
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ifp->if_flags = IFF_SIMPLEX | IFF_MULTICAST | IFF_BROADCAST;
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ifp->if_capabilities = IFCAP_HWCSUM | IFCAP_VLAN_MTU;
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ifp->if_capenable = ifp->if_capabilities;
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ifp->if_capabilities = IFCAP_VLAN_MTU;
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if (sc->mge_hw_csum) {
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ifp->if_capabilities |= IFCAP_HWCSUM;
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ifp->if_hwassist = MGE_CHECKSUM_FEATURES;
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}
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ifp->if_capenable = ifp->if_capabilities;
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#ifdef DEVICE_POLLING
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/* Advertise that polling is supported */
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@ -717,13 +732,15 @@ mge_attach(device_t dev)
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MGE_WRITE(sc, MGE_REG_PHYDEV, miisc->mii_phy);
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/* Attach interrupt handlers */
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for (i = 0; i < 2; ++i) {
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error = bus_setup_intr(dev, sc->res[1 + i],
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INTR_TYPE_NET | INTR_MPSAFE, NULL, *mge_intrs[i].handler,
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sc, &sc->ih_cookie[i]);
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/* TODO: review flags, in part. mark RX as INTR_ENTROPY ? */
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for (i = 1; i <= sc->mge_intr_cnt; ++i) {
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error = bus_setup_intr(dev, sc->res[i],
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INTR_TYPE_NET | INTR_MPSAFE,
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NULL, *mge_intrs[(sc->mge_intr_cnt == 1 ? 0 : i)].handler,
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sc, &sc->ih_cookie[i - 1]);
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if (error) {
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device_printf(dev, "could not setup %s\n",
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mge_intrs[i].description);
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mge_intrs[(sc->mge_intr_cnt == 1 ? 0 : i)].description);
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mge_detach(dev);
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return (error);
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}
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@ -748,14 +765,14 @@ mge_detach(device_t dev)
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callout_drain(&sc->wd_callout);
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/* Stop and release all interrupts */
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for (i = 0; i < 2; ++i) {
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for (i = 0; i < sc->mge_intr_cnt; ++i) {
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if (!sc->ih_cookie[i])
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continue;
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error = bus_teardown_intr(dev, sc->res[1 + i], sc->ih_cookie[i]);
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if (error)
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device_printf(dev, "could not release %s\n",
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mge_intrs[i].description);
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mge_intrs[(sc->mge_intr_cnt == 1 ? 0 : i + 1)].description);
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}
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/* Detach network interface */
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@ -982,6 +999,41 @@ mge_init_locked(void *arg)
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callout_reset(&sc->wd_callout, hz, mge_tick, sc);
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}
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static void
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mge_intr_rxtx(void *arg)
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{
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struct mge_softc *sc = arg;
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uint32_t int_cause, int_cause_ext;
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MGE_GLOBAL_LOCK(sc);
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#ifdef DEVICE_POLLING
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if (sc->ifp->if_capenable & IFCAP_POLLING) {
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MGE_GLOBAL_UNLOCK(sc);
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return;
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}
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#endif
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/* Get interrupt cause */
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int_cause = MGE_READ(sc, MGE_PORT_INT_CAUSE);
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int_cause_ext = MGE_READ(sc, MGE_PORT_INT_CAUSE_EXT);
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/* Check for Transmit interrupt */
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if (int_cause_ext & (MGE_PORT_INT_EXT_TXBUF0 |
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MGE_PORT_INT_EXT_TXUR)) {
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MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, ~(int_cause_ext &
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(MGE_PORT_INT_EXT_TXBUF0 | MGE_PORT_INT_EXT_TXUR)));
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mge_intr_tx_locked(sc);
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}
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MGE_TRANSMIT_UNLOCK(sc);
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/* Check for Receive interrupt */
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mge_intr_rx_check(sc, int_cause, int_cause_ext);
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MGE_RECEIVE_UNLOCK(sc);
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}
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static void
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mge_intr_err(void *arg)
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{
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@ -1020,11 +1072,20 @@ mge_intr_rx(void *arg) {
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int_cause = MGE_READ(sc, MGE_PORT_INT_CAUSE);
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int_cause_ext = MGE_READ(sc, MGE_PORT_INT_CAUSE_EXT);
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mge_intr_rx_check(sc, int_cause, int_cause_ext);
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MGE_RECEIVE_UNLOCK(sc);
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}
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static void
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mge_intr_rx_check(struct mge_softc *sc, uint32_t int_cause,
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uint32_t int_cause_ext)
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{
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/* Check for resource error */
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if (int_cause & MGE_PORT_INT_RXERRQ0) {
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mge_reinit_rx(sc);
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MGE_WRITE(sc, MGE_PORT_INT_CAUSE,
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int_cause & ~MGE_PORT_INT_RXERRQ0);
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~(int_cause & MGE_PORT_INT_RXERRQ0));
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}
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int_cause &= MGE_PORT_INT_RXQ0;
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@ -1035,11 +1096,8 @@ mge_intr_rx(void *arg) {
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MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, ~int_cause_ext);
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mge_intr_rx_locked(sc, -1);
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}
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MGE_RECEIVE_UNLOCK(sc);
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}
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static int
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mge_intr_rx_locked(struct mge_softc *sc, int count)
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{
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@ -1130,8 +1188,8 @@ mge_intr_tx(void *arg)
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/* Ack the interrupt */
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int_cause_ext = MGE_READ(sc, MGE_PORT_INT_CAUSE_EXT);
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MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT,
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int_cause_ext & ~MGE_PORT_INT_EXT_TXBUF0);
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MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, ~(int_cause_ext &
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(MGE_PORT_INT_EXT_TXBUF0 | MGE_PORT_INT_EXT_TXUR)));
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mge_intr_tx_locked(sc);
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@ -1401,12 +1459,12 @@ mge_encap(struct mge_softc *sc, struct mbuf *m0)
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dw->mge_desc->byte_count = segs[seg].ds_len;
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dw->mge_desc->buffer = segs[seg].ds_addr;
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dw->buffer = m0;
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dw->mge_desc->cmd_status = MGE_TX_LAST | MGE_TX_FIRST |
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MGE_TX_ETH_CRC | MGE_TX_EN_INT | MGE_TX_PADDING |
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MGE_DMA_OWNED;
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dw->mge_desc->cmd_status = 0;
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if (seg == 0)
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mge_offload_setup_descriptor(sc, dw);
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dw->mge_desc->cmd_status |= MGE_TX_LAST | MGE_TX_FIRST |
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MGE_TX_ETH_CRC | MGE_TX_EN_INT | MGE_TX_PADDING |
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MGE_DMA_OWNED;
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}
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bus_dmamap_sync(sc->mge_desc_dtag, dw->desc_dmap,
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@ -103,6 +103,8 @@ struct mge_softc {
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uint32_t mge_tx_tok_cnt;
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uint16_t mge_mtu;
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int mge_ver;
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int mge_intr_cnt;
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uint8_t mge_hw_csum;
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struct mge_softc *phy_sc;
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};
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