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Pull in r165377 from upstream llvm trunk:

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X86: fcmov doesn't handle all possible EFLAGS, fall back to a branch
  for the others.

  Otherwise it will try to use SSE patterns and fail horribly if sse is
  disabled.

  Fixes PR14035.

This should fix the following assertion failure:

  Assertion failed: (Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP
  register!"), function getFPReg, file
  contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 330.

which can show up when compiling contrib/compiler-rt, using -march=i686
through -march=pentium3 (CPU's which do support fcmov, but don't support
SSE2).

MFC after:	1 week
This commit is contained in:
Dimitry Andric 2012-10-30 22:09:53 +00:00
parent 549f62fa42
commit 762496516b
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=242380
1 changed files with 8 additions and 1 deletions
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9
contrib/llvm/lib/Target/X86/X86InstrCompiler.td
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@ -453,6 +453,11 @@ def CMOV_GR16 : I<0, Pseudo,
"#CMOV_GR16* PSEUDO!",
[(set GR16:$dst,
(X86cmov GR16:$src1, GR16:$src2, imm:$cond, EFLAGS))]>;
} // Predicates = [NoCMov]
// fcmov doesn't handle all possible EFLAGS, provide a fallback if there is no
// SSE1.
let Predicates = [FPStackf32] in
def CMOV_RFP32 : I<0, Pseudo,
(outs RFP32:$dst),
(ins RFP32:$src1, RFP32:$src2, i8imm:$cond),
@ -460,6 +465,9 @@ def CMOV_RFP32 : I<0, Pseudo,
[(set RFP32:$dst,
(X86cmov RFP32:$src1, RFP32:$src2, imm:$cond,
EFLAGS))]>;
// fcmov doesn't handle all possible EFLAGS, provide a fallback if there is no
// SSE2.
let Predicates = [FPStackf64] in
def CMOV_RFP64 : I<0, Pseudo,
(outs RFP64:$dst),
(ins RFP64:$src1, RFP64:$src2, i8imm:$cond),
@ -474,7 +482,6 @@ def CMOV_RFP80 : I<0, Pseudo,
[(set RFP80:$dst,
(X86cmov RFP80:$src1, RFP80:$src2, imm:$cond,
EFLAGS))]>;
} // Predicates = [NoCMov]
} // UsesCustomInserter = 1, Uses = [EFLAGS]