Pull in r165377 from upstream llvm trunk:
X86: fcmov doesn't handle all possible EFLAGS, fall back to a branch for the others. Otherwise it will try to use SSE patterns and fail horribly if sse is disabled. Fixes PR14035. This should fix the following assertion failure: Assertion failed: (Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"), function getFPReg, file contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 330. which can show up when compiling contrib/compiler-rt, using -march=i686 through -march=pentium3 (CPU's which do support fcmov, but don't support SSE2). MFC after: 1 week
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=242380
@ -453,6 +453,11 @@ def CMOV_GR16 : I<0, Pseudo,
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"#CMOV_GR16* PSEUDO!",
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[(set GR16:$dst,
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(X86cmov GR16:$src1, GR16:$src2, imm:$cond, EFLAGS))]>;
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} // Predicates = [NoCMov]
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// fcmov doesn't handle all possible EFLAGS, provide a fallback if there is no
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// SSE1.
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let Predicates = [FPStackf32] in
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def CMOV_RFP32 : I<0, Pseudo,
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(outs RFP32:$dst),
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(ins RFP32:$src1, RFP32:$src2, i8imm:$cond),
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@ -460,6 +465,9 @@ def CMOV_RFP32 : I<0, Pseudo,
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[(set RFP32:$dst,
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(X86cmov RFP32:$src1, RFP32:$src2, imm:$cond,
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EFLAGS))]>;
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// fcmov doesn't handle all possible EFLAGS, provide a fallback if there is no
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// SSE2.
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let Predicates = [FPStackf64] in
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def CMOV_RFP64 : I<0, Pseudo,
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(outs RFP64:$dst),
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(ins RFP64:$src1, RFP64:$src2, i8imm:$cond),
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@ -474,7 +482,6 @@ def CMOV_RFP80 : I<0, Pseudo,
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[(set RFP80:$dst,
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(X86cmov RFP80:$src1, RFP80:$src2, imm:$cond,
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EFLAGS))]>;
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} // Predicates = [NoCMov]
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} // UsesCustomInserter = 1, Uses = [EFLAGS]
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