Only attempt to list extended capabilities for devices that have a
PCI-express capabilities. Non-PCI-express PCI devices may simply ignore the upper bits in a config register address effectively aliasing the device ID register to 0x100 rather than returning 0xFFFFFFFF. Previously the code relied on these reads returning 0xFFFFFFFF. MFC after: 3 days
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=212749
@ -460,6 +460,7 @@ cap_pciaf(int fd, struct pci_conf *p, uint8_t ptr)
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void
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list_caps(int fd, struct pci_conf *p)
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{
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int express;
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uint16_t sta;
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uint8_t ptr, cap;
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@ -481,6 +482,7 @@ list_caps(int fd, struct pci_conf *p)
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}
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/* Walk the capability list. */
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express = 0;
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ptr = read_config(fd, &p->pc_sel, ptr, 1);
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while (ptr != 0 && ptr != 0xff) {
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cap = read_config(fd, &p->pc_sel, ptr + PCICAP_ID, 1);
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@ -514,6 +516,7 @@ list_caps(int fd, struct pci_conf *p)
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cap_subvendor(fd, p, ptr);
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break;
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case PCIY_EXPRESS:
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express = 1;
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cap_express(fd, p, ptr);
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break;
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case PCIY_MSIX:
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@ -533,7 +536,8 @@ list_caps(int fd, struct pci_conf *p)
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ptr = read_config(fd, &p->pc_sel, ptr + PCICAP_NEXTPTR, 1);
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}
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list_ecaps(fd, p);
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if (express)
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list_ecaps(fd, p);
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}
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/* From <sys/systm.h>. */
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