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Switch to using the new $PIR interrupt routing code and remove the old

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code.  The pci_cfgreg.c file now just controls reading/writing PCI config
registers.
This commit is contained in:
John Baldwin 2004-02-18 22:41:53 +00:00
parent 2e41ba54d6
commit 77fa00fa7c
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=125981
4 changed files with 22 additions and 436 deletions
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1
sys/conf/files.i386
View File

@ -298,6 +298,7 @@ i386/linux/linux_sysent.c optional compat_linux
i386/linux/linux_sysvec.c optional compat_linux
i386/pci/pci_cfgreg.c optional pci
i386/pci/pci_bus.c optional pci
i386/pci/pci_pir.c optional pci
i386/svr4/svr4_locore.s optional compat_svr4 \
dependency "svr4_assym.h" \
warning "COMPAT_SVR4 is broken and should be avoided"

6
sys/i386/include/pci_cfgreg.h
View File

@ -50,5 +50,7 @@
int pci_cfgregopen(void);
u_int32_t pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
void pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
int pci_cfgintr(int bus, int device, int pin, int oldirq);
int pci_probe_route_table(int bus);
void pci_pir_open(void);
void pci_pir_parse(void);
int pci_pir_probe(int bus, int require_parse);
int pci_pir_route_interrupt(int bus, int device, int func, int pin);

22
sys/i386/pci/pci_bus.c
View File

@ -33,7 +33,6 @@ __FBSDID("$FreeBSD$");
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/malloc.h>
#include <dev/pci/pcivar.h>
@ -42,10 +41,6 @@ __FBSDID("$FreeBSD$");
#include <isa/isavar.h>
#include <machine/legacyvar.h>
#include <machine/pci_cfgreg.h>
#include <machine/segments.h>
#include <machine/cputypes.h>
#include <machine/pc/bios.h>
#include <machine/md_var.h>
#include "pcib_if.h"
@ -426,9 +421,16 @@ legacy_pcib_probe(device_t dev)
int
legacy_pcib_attach(device_t dev)
{
int bus;
device_add_child(dev, "pci", pcib_get_bus(dev));
/*
* Look for a PCI BIOS interrupt routing table as that will be
* our method of routing interrupts if we have one.
*/
bus = pcib_get_bus(dev);
if (pci_pir_probe(bus, 0))
pci_pir_parse();
device_add_child(dev, "pci", bus);
return bus_generic_attach(dev);
}
@ -662,7 +664,7 @@ pcibios_pcib_probe(device_t dev)
bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
if (bus == 0)
return (ENXIO);
if (pci_probe_route_table(bus) == 0)
if (!pci_pir_probe(bus, 1))
return (ENXIO);
device_set_desc(dev, "PCIBIOS PCI-PCI bridge");
return (-2000);
@ -671,6 +673,6 @@ pcibios_pcib_probe(device_t dev)
static int
pcibios_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
{
return(pci_cfgintr(pci_get_bus(dev), pci_get_slot(dev), pin,
pci_get_irq(dev)));
return (pci_pir_route_interrupt(pci_get_bus(dev), pci_get_slot(dev),
pci_get_function(dev), pin));
}

429
sys/i386/pci/pci_cfgreg.c
View File

@ -29,27 +29,16 @@
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h> /* XXX trim includes */
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/malloc.h>
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/sysctl.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/md_var.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <isa/isavar.h>
#include <machine/pci_cfgreg.h>
#include <machine/segments.h>
#include <machine/pc/bios.h>
#include "pcib_if.h"
#define PRVERB(a) do { \
if (bootverbose) \
printf a ; \
@ -58,40 +47,12 @@ __FBSDID("$FreeBSD$");
static int cfgmech;
static int devmax;
static int pci_cfgintr_valid(struct PIR_entry *pe, int pin, int irq);
static int pci_cfgintr_unique(struct PIR_entry *pe, int pin);
static int pci_cfgintr_linked(struct PIR_entry *pe, int pin);
static int pci_cfgintr_search(struct PIR_entry *pe, int bus, int device, int matchpin, int pin);
static int pci_cfgintr_virgin(struct PIR_entry *pe, int pin);
static void pci_print_irqmask(u_int16_t irqs);
static void pci_print_route_table(struct PIR_table *prt, int size);
static int pcireg_cfgread(int bus, int slot, int func, int reg, int bytes);
static void pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes);
static int pcireg_cfgopen(void);
static struct PIR_table *pci_route_table;
static int pci_route_count;
static struct mtx pcicfg_mtx;
/* sysctl vars */
SYSCTL_DECL(_hw_pci);
#ifdef PC98
#define PCI_IRQ_OVERRIDE_MASK 0x3e68
#else
#define PCI_IRQ_OVERRIDE_MASK 0xdef4
#endif
static uint32_t pci_irq_override_mask = PCI_IRQ_OVERRIDE_MASK;
TUNABLE_INT("hw.pci.irq_override_mask", &pci_irq_override_mask);
SYSCTL_INT(_hw_pci, OID_AUTO, irq_override_mask, CTLFLAG_RDTUN,
&pci_irq_override_mask, PCI_IRQ_OVERRIDE_MASK,
"Mask of allowed irqs to try to route when it has no good clue about\n"
"which irqs it should use.");
/*
* Some BIOS writers seem to want to ignore the spec and put
* 0 in the intline rather than 255 to indicate none. Some use
@ -135,11 +96,7 @@ int
pci_cfgregopen(void)
{
static int opened = 0;
u_long sigaddr;
static struct PIR_table *pt;
u_int16_t v;
u_int8_t ck, *cv;
int i;
if (opened)
return(1);
@ -151,42 +108,12 @@ pci_cfgregopen(void)
if (v > 0)
printf("pcibios: BIOS version %x.%02x\n", (v & 0xff00) >> 8,
v & 0xff);
/*
* Look for the interrupt routing table.
*
* We use PCI BIOS's PIR table if it's available $PIR is the
* standard way to do this. Sadly, some machines are not
* standards conforming and have _PIR instead. We shrug and cope
* by looking for both.
*/
if (pcibios_get_version() >= 0x0210 && pt == NULL) {
sigaddr = bios_sigsearch(0, "$PIR", 4, 16, 0);
if (sigaddr == 0)
sigaddr = bios_sigsearch(0, "_PIR", 4, 16, 0);
if (sigaddr != 0) {
pt = (struct PIR_table *)(uintptr_t)
BIOS_PADDRTOVADDR(sigaddr);
for (cv = (u_int8_t *)pt, ck = 0, i = 0;
i < (pt->pt_header.ph_length); i++) {
ck += cv[i];
}
if (ck == 0 && pt->pt_header.ph_length >
sizeof(struct PIR_header)) {
pci_route_table = pt;
pci_route_count = (pt->pt_header.ph_length -
sizeof(struct PIR_header)) /
sizeof(struct PIR_entry);
printf("Using $PIR table, %d entries at %p\n",
pci_route_count, pci_route_table);
if (bootverbose)
pci_print_route_table(pci_route_table,
pci_route_count);
}
}
}
mtx_init(&pcicfg_mtx, "pcicfg", NULL, MTX_SPIN);
opened = 1;
/* $PIR requires PCI BIOS 2.10 or greater. */
if (v >= 0x0210)
pci_pir_open();
return(1);
}
@ -220,352 +147,6 @@ pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
pcireg_cfgwrite(bus, slot, func, reg, data, bytes);
}
/*
* Route a PCI interrupt
*/
int
pci_cfgintr(int bus, int device, int pin, int oldirq)
{
struct PIR_entry *pe;
int i, irq;
struct bios_regs args;
u_int16_t v;
int already = 0;
int errok = 0;
v = pcibios_get_version();
if (v < 0x0210) {
PRVERB((
"pci_cfgintr: BIOS %x.%02x doesn't support interrupt routing\n",
(v & 0xff00) >> 8, v & 0xff));
return (PCI_INVALID_IRQ);
}
if ((bus < 0) || (bus > 255) || (device < 0) || (device > 255) ||
(pin < 1) || (pin > 4))
return(PCI_INVALID_IRQ);
/*
* Scan the entry table for a contender
*/
for (i = 0, pe = &pci_route_table->pt_entry[0]; i < pci_route_count;
i++, pe++) {
if ((bus != pe->pe_bus) || (device != pe->pe_device))
continue;
/*
* A link of 0 means that this intpin is not connected to
* any other device's interrupt pins and is not connected to
* any of the Interrupt Router's interrupt pins, so we can't
* route it.
*/
if (pe->pe_intpin[pin - 1].link == 0)
continue;
if (pci_cfgintr_valid(pe, pin, oldirq)) {
printf("pci_cfgintr: %d:%d INT%c BIOS irq %d\n", bus,
device, 'A' + pin - 1, oldirq);
return (oldirq);
}
/*
* We try to find a linked interrupt, then we look to see
* if the interrupt is uniquely routed, then we look for
* a virgin interrupt. The virgin interrupt should return
* an interrupt we can route, but if that fails, maybe we
* should try harder to route a different interrupt.
* However, experience has shown that that's rarely the
* failure mode we see.
*/
irq = pci_cfgintr_linked(pe, pin);
if (irq != PCI_INVALID_IRQ)
already = 1;
if (irq == PCI_INVALID_IRQ) {
irq = pci_cfgintr_unique(pe, pin);
if (irq != PCI_INVALID_IRQ)
errok = 1;
}
if (irq == PCI_INVALID_IRQ)
irq = pci_cfgintr_virgin(pe, pin);
if (irq == PCI_INVALID_IRQ)
break;
/*
* Ask the BIOS to route the interrupt. If we picked an
* interrupt that failed, we should really try other
* choices that the BIOS offers us.
*
* For uniquely routed interrupts, we need to try
* to route them on some machines. Yet other machines
* fail to route, so we have to pretend that in that
* case it worked. Isn't pc hardware fun?
*
* NOTE: if we want to whack hardware to do this, then
* I think the right way to do that would be to have
* bridge drivers that do this. I'm not sure that the
* $PIR table would be valid for those interrupt
* routers.
*/
args.eax = PCIBIOS_ROUTE_INTERRUPT;
args.ebx = (bus << 8) | (device << 3);
/* pin value is 0xa - 0xd */
args.ecx = (irq << 8) | (0xa + pin - 1);
if (!already &&
bios32(&args, PCIbios.ventry, GSEL(GCODE_SEL, SEL_KPL)) &&
!errok) {
PRVERB(("pci_cfgintr: ROUTE_INTERRUPT failed.\n"));
return(PCI_INVALID_IRQ);
}
printf("pci_cfgintr: %d:%d INT%c routed to irq %d\n", bus,
device, 'A' + pin - 1, irq);
return(irq);
}
PRVERB(("pci_cfgintr: can't route an interrupt to %d:%d INT%c\n", bus,
device, 'A' + pin - 1));
return(PCI_INVALID_IRQ);
}
/*
* Check to see if an existing IRQ setting is valid.
*/
static int
pci_cfgintr_valid(struct PIR_entry *pe, int pin, int irq)
{
uint32_t irqmask;
if (!PCI_INTERRUPT_VALID(irq))
return (0);
irqmask = pe->pe_intpin[pin - 1].irqs;
if (irqmask & (1 << irq)) {
PRVERB(("pci_cfgintr_valid: BIOS irq %d is valid\n", irq));
return (1);
}
return (0);
}
/*
* Look to see if the routing table claims this pin is uniquely routed.
*/
static int
pci_cfgintr_unique(struct PIR_entry *pe, int pin)
{
int irq;
uint32_t irqmask;
irqmask = pe->pe_intpin[pin - 1].irqs;
if (irqmask != 0 && powerof2(irqmask)) {
irq = ffs(irqmask) - 1;
PRVERB(("pci_cfgintr_unique: hard-routed to irq %d\n", irq));
return(irq);
}
return(PCI_INVALID_IRQ);
}
/*
* Look for another device which shares the same link byte and
* already has a unique IRQ, or which has had one routed already.
*/
static int
pci_cfgintr_linked(struct PIR_entry *pe, int pin)
{
struct PIR_entry *oe;
struct PIR_intpin *pi;
int i, j, irq;
/*
* Scan table slots.
*/
for (i = 0, oe = &pci_route_table->pt_entry[0]; i < pci_route_count;
i++, oe++) {
/* scan interrupt pins */
for (j = 0, pi = &oe->pe_intpin[0]; j < 4; j++, pi++) {
/* don't look at the entry we're trying to match */
if ((pe == oe) && (i == (pin - 1)))
continue;
/* compare link bytes */
if (pi->link != pe->pe_intpin[pin - 1].link)
continue;
/* link destination mapped to a unique interrupt? */
if (pi->irqs != 0 && powerof2(pi->irqs)) {
irq = ffs(pi->irqs) - 1;
PRVERB(("pci_cfgintr_linked: linked (%x) to hard-routed irq %d\n",
pi->link, irq));
return(irq);
}
/*
* look for the real PCI device that matches this
* table entry
*/
irq = pci_cfgintr_search(pe, oe->pe_bus, oe->pe_device,
j + 1, pin);
if (irq != PCI_INVALID_IRQ)
return(irq);
}
}
return(PCI_INVALID_IRQ);
}
/*
* Scan for the real PCI device at (bus)/(device) using intpin (matchpin) and
* see if it has already been assigned an interrupt.
*/
static int
pci_cfgintr_search(struct PIR_entry *pe, int bus, int device, int matchpin, int pin)
{
devclass_t pci_devclass;
device_t *pci_devices;
int pci_count;
device_t *pci_children;
int pci_childcount;
device_t *busp, *childp;
int i, j, irq;
/*
* Find all the PCI busses.
*/
pci_count = 0;
if ((pci_devclass = devclass_find("pci")) != NULL)
devclass_get_devices(pci_devclass, &pci_devices, &pci_count);
/*
* Scan all the PCI busses/devices looking for this one.
*/
irq = PCI_INVALID_IRQ;
for (i = 0, busp = pci_devices; (i < pci_count) && (irq == PCI_INVALID_IRQ);
i++, busp++) {
pci_childcount = 0;
device_get_children(*busp, &pci_children, &pci_childcount);
for (j = 0, childp = pci_children; j < pci_childcount; j++,
childp++) {
if ((pci_get_bus(*childp) == bus) &&
(pci_get_slot(*childp) == device) &&
(pci_get_intpin(*childp) == matchpin)) {
irq = pci_i386_map_intline(pci_get_irq(*childp));
if (irq != PCI_INVALID_IRQ)
PRVERB(("pci_cfgintr_search: linked (%x) to configured irq %d at %d:%d:%d\n",
pe->pe_intpin[pin - 1].link, irq,
pci_get_bus(*childp),
pci_get_slot(*childp),
pci_get_function(*childp)));
break;
}
}
if (pci_children != NULL)
free(pci_children, M_TEMP);
}
if (pci_devices != NULL)
free(pci_devices, M_TEMP);
return(irq);
}
/*
* Pick a suitable IRQ from those listed as routable to this device.
*/
static int
pci_cfgintr_virgin(struct PIR_entry *pe, int pin)
{
int irq, ibit;
/*
* first scan the set of PCI-only interrupts and see if any of these
* are routable
*/
for (irq = 0; irq < 16; irq++) {
ibit = (1 << irq);
/* can we use this interrupt? */
if ((pci_route_table->pt_header.ph_pci_irqs & ibit) &&
(pe->pe_intpin[pin - 1].irqs & ibit)) {
PRVERB(("pci_cfgintr_virgin: using routable PCI-only interrupt %d\n", irq));
return(irq);
}
}
/* life is tough, so just pick an interrupt */
for (irq = 0; irq < 16; irq++) {
ibit = (1 << irq);
if ((ibit & pci_irq_override_mask) == 0)
continue;
if (pe->pe_intpin[pin - 1].irqs & ibit) {
PRVERB(("pci_cfgintr_virgin: using routable interrupt %d\n", irq));
return(irq);
}
}
return(PCI_INVALID_IRQ);
}
static void
pci_print_irqmask(u_int16_t irqs)
{
int i, first;
if (irqs == 0) {
printf("none");
return;
}
first = 1;
for (i = 0; i < 16; i++, irqs >>= 1)
if (irqs & 1) {
if (!first)
printf(" ");
else
first = 0;
printf("%d", i);
}
}
/*
* Dump the contents of a PCI BIOS Interrupt Routing Table to the console.
*/
static void
pci_print_route_table(struct PIR_table *prt, int size)
{
struct PIR_entry *entry;
struct PIR_intpin *intpin;
int i, pin;
printf("PCI-Only Interrupts: ");
pci_print_irqmask(prt->pt_header.ph_pci_irqs);
printf("\nLocation Bus Device Pin Link IRQs\n");
entry = &prt->pt_entry[0];
for (i = 0; i < size; i++, entry++) {
intpin = &entry->pe_intpin[0];
for (pin = 0; pin < 4; pin++, intpin++)
if (intpin->link != 0) {
if (entry->pe_slot == 0)
printf("embedded ");
else
printf("slot %-3d ", entry->pe_slot);
printf(" %3d %3d %c 0x%02x ",
entry->pe_bus, entry->pe_device,
'A' + pin, intpin->link);
pci_print_irqmask(intpin->irqs);
printf("\n");
}
}
}
/*
* See if any interrupts for a given PCI bus are routed in the PIR. Don't
* even bother looking if the BIOS doesn't support routing anyways.
*/
int
pci_probe_route_table(int bus)
{
int i;
u_int16_t v;
v = pcibios_get_version();
if (v < 0x0210)
return (0);
for (i = 0; i < pci_route_count; i++)
if (pci_route_table->pt_entry[i].pe_bus == bus)
return (1);
return (0);
}
/*
* Configuration space access using direct register operations
*/