Add gem5 support, so we attach there as well.
Fix the boundary limit to end at the end of the region and not one beyond (1). Diagnosed by: andrew (1) Reviewed by: andrew, br Sponsored by: DARPA/AFRL Differential Revision: https://reviews.freebsd.org/D5493
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parent
3d9ac4ecfc
commit
788c03c3d8
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=296316
@ -143,6 +143,10 @@ generic_pcie_probe(device_t dev)
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device_set_desc(dev, "Generic PCI host controller");
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device_set_desc(dev, "Generic PCI host controller");
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return (BUS_PROBE_GENERIC);
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return (BUS_PROBE_GENERIC);
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}
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}
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if (ofw_bus_is_compatible(dev, "arm,gem5_pcie")) {
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device_set_desc(dev, "GEM5 PCIe host controller");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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return (ENXIO);
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}
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}
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@ -208,12 +212,11 @@ pci_host_generic_attach(device_t dev)
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continue; /* empty range element */
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continue; /* empty range element */
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if (sc->ranges[tuple].flags & FLAG_MEM) {
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if (sc->ranges[tuple].flags & FLAG_MEM) {
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error = rman_manage_region(&sc->mem_rman,
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error = rman_manage_region(&sc->mem_rman,
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phys_base,
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phys_base, phys_base + size - 1);
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phys_base + size);
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} else if (sc->ranges[tuple].flags & FLAG_IO) {
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} else if (sc->ranges[tuple].flags & FLAG_IO) {
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error = rman_manage_region(&sc->io_rman,
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error = rman_manage_region(&sc->io_rman,
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pci_base + PCI_IO_WINDOW_OFFSET,
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pci_base + PCI_IO_WINDOW_OFFSET,
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pci_base + PCI_IO_WINDOW_OFFSET + size);
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pci_base + PCI_IO_WINDOW_OFFSET + size - 1);
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} else
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} else
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continue;
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continue;
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if (error) {
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if (error) {
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